公开(公告)号：US20130149838A1

公开(公告)日：2013-06-13

申请号：US13749526

申请日：2013-01-24

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe Saggio ,  Domenico Murabito ,  Letterio Fiore ,  Giuseppe Morale

IPC: H01L21/762

CPC classification number: H01L21/762 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/3247 ,  H01L29/0634 ,  H01L29/0638 ,  H01L29/1095 ,  H01L29/42376 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A process for manufacturing a semiconductor device envisages the steps of: providing a semiconductor material body having at least one deep trench that extends through said body of semiconductor material starting from a top surface thereof; and filling the deep trench via an epitaxial growth of semiconductor material, thereby forming a columnar structure within the body of semiconductor material. The manufacturing process further envisages the step of modulating the epitaxial growth by means of a concurrent chemical etching of the semiconductor material that is undergoing epitaxial growth so as to obtain a compact filling free from voids of the deep trench; in particular, a flow of etching gas is introduced into the same reaction environment as that of the epitaxial growth, wherein a flow of source gas is supplied for the same epitaxial growth.

Abstract translation: 制造半导体器件的方法设想的步骤是：提供具有至少一个深沟槽的半导体材料体，该深沟槽从其顶表面开始延伸穿过半导体材料体; 并通过半导体材料的外延生长填充深沟槽，由此在半导体材料体内形成柱状结构。 制造工艺进一步设想通过正在进行外延生长的半导体材料的同时化学蚀刻来调制外延生长的步骤，从而获得没有深沟槽空隙的紧密填充物; 特别地，将蚀刻气体流引入到与外延生长相同的反应环境中，其中为相同的外延生长提供源气体的流动。

公开(公告)号：US09324803B2

公开(公告)日：2016-04-26

申请号：US14283045

申请日：2014-05-20

Applicant: STMICROELECTRONICS S.r.l.

Inventor： Giuseppe Morale ,  Carlo Magro ,  Domenico Murabito ,  Tiziana Cuscani

IPC: H01L29/772 ,  H01L29/10 ,  H01L29/66 ,  H01L29/78 ,  H01L21/324 ,  H01L29/739 ,  H01L29/06 ,  H01L21/02

CPC classification number: H01L29/1095 ,  H01L21/0243 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02634 ,  H01L21/02639 ,  H01L21/3247 ,  H01L29/0634 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7397 ,  H01L29/7802 ,  H01L29/7811 ,  H01L29/7813

Abstract: A method for manufacturing a semiconductor power device, comprising the steps of: forming a trench in a semiconductor body having a first type of conductivity; partially filling the trench with semiconductor material via epitaxial growth so as to obtain a first column having a second type of conductivity and having an internal cavity. The epitaxial growth includes simultaneously supplying a gas containing dopant ions of the second type of conductivity, hydrochloric acid HCl in gaseous form and dichlorosilane DCS in gaseous form, so that the ratio between the amount of HCl and the amount of DCS has a value of from 3.5 to 5.5.

Abstract translation: 一种制造半导体功率器件的方法，包括以下步骤：在具有第一类导电性的半导体本体中形成沟槽; 通过外延生长部分地用半导体材料填充沟槽，以便获得具有第二类导电性并具有内腔的第一柱。 外延生长包括同时供应气体中含有第二类导电性掺杂离子的气体，气态形式的盐酸HCl和气态的二氯硅烷DCS，使得HCl与DCS的量之间的比值为 3.5至5.5。

公开(公告)号：US09627472B2

公开(公告)日：2017-04-18

申请号：US14824813

申请日：2015-08-12

Applicant: STMICROELECTRONICS S.R.L.

Inventor： Mario Giuseppe Saggio ,  Domenico Murabito ,  Angelo Magri'

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/78 ,  H01L29/08 ,  H01L29/739 ,  H01L29/10 ,  H01L29/66 ,  H01L29/417

CPC classification number: H01L29/0634 ,  H01L27/088 ,  H01L29/0649 ,  H01L29/086 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/7811

Abstract: An embodiment of a structure for a high voltage device of the type which comprises at least a semiconductor substrate being covered by an epitaxial layer of a first type of conductivity, wherein a plurality of column structures are realized, which column structures comprises high aspect ratio deep trenches, said epitaxial layer being in turn covered by an active surface area wherein said high voltage device is realized, each of the column structures comprising at least an external portion being in turn realized by a silicon epitaxial layer of a second type of conductivity, opposed than said first type of conductivity and having a dopant charge which counterbalances the dopant charge being in said epitaxial layer outside said column structures, as well as a dielectric filling portion which is realized inside said external portion in order to completely fill said deep trench.