公开(公告)号：US20160149695A1

公开(公告)日：2016-05-26

申请号：US15009696

申请日：2016-01-28

Applicant: STMicroelectronics International N.V.

Inventor： Abhishek CHOWDHARY ,  Vivek UPPAL ,  Alok KAUSHIK ,  Sajal Kumar MANDAL ,  Tapas NANDY ,  Sanjeev CHOPRA

IPC: H04L7/033 ,  H04L12/26

CPC classification number: H04L7/0087 ,  H03L7/0807 ,  H03L7/091 ,  H04L7/0004 ,  H04L7/005 ,  H04L7/033 ,  H04L7/0331 ,  H04L7/0338 ,  H04L25/03057 ,  H04L43/022

Abstract: A method, algorithm, architecture, circuit and/or system that compensates for frequency difference in oversampled CDRs. The oversampled CDR uses a programmable divider whose division ratio is changed, for one or more cycles, from its usual division ratio, when accumulated phase movement in either direction exceeds a threshold. Accordingly, the elasticity buffer in oversampled CDRs can be made much smaller or entirely eliminated, resulting in less area, and reduced or eliminated dependence of max allowed burst size on ppm difference. The threshold can be kept programmable, and more than half unit interval, to provide robustness towards high frequency jitter.

公开(公告)号：US20160119117A1

公开(公告)日：2016-04-28

申请号：US14986152

申请日：2015-12-31

Applicant: STMicroelectronics International N.V.

Inventor： Abhishek CHOWDHARY ,  Vivek UPPAL ,  Alok KAUSHIK ,  Sajal Kumar MANDAL ,  Tapas NANDY ,  Sanjeev CHOPRA

IPC: H04L7/00 ,  H03L7/08 ,  H04L7/033

CPC classification number: H04L7/0087 ,  H03L7/0807 ,  H03L7/091 ,  H04L7/0004 ,  H04L7/005 ,  H04L7/033 ,  H04L7/0331 ,  H04L7/0338 ,  H04L25/03057 ,  H04L43/022

Abstract: A method, algorithm, architecture, circuit and/or system that compensates for frequency difference in oversampled CDRs. The oversampled CDR uses a programmable divider whose division ratio is changed, for one or more cycles, from its usual division ratio, when accumulated phase movement in either direction exceeds a threshold. Accordingly, the elasticity buffer in oversampled CDRs can be made much smaller or entirely eliminated, resulting in less area, and reduced or eliminated dependence of max allowed burst size on ppm difference. The threshold can be kept programmable, and more than half unit interval, to provide robustness towards high frequency jitter.

公开(公告)号：US20140368176A1

公开(公告)日：2014-12-18

申请号：US13915828

申请日：2013-06-12

Applicant: STMicroelectronics International N.V.

Inventor： Pralay MANDAL ,  Sajal Kumar MANDAL

IPC: G05F1/445

CPC classification number: G05F1/445 ,  G05F1/575

Abstract: In an embodiment, an electronic includes a feedback-coupled circuit stage and a compensation circuit stage. The feedback-coupled stage is configured to drive a load, and the compensation stage is coupled to the feedback-coupled stage such that a combination of the compensation and feedback-coupled stages has a frequency response including a first root and an opposite second root that depend on the load. For example, an embodiment of such an electronic circuit may be a low-dropout (LDO) voltage regulator that lacks a large output capacitance for forming a dominant pole to stabilize the regulator. The regulator includes a feedback-coupled stage that generates and regulates an output voltage, and includes a compensation stage that is designed such that the frequency response of the regulator includes a zero that tracks a non-dominant output pole of the regulator so that the output pole does not adversely affect the stability of the regulator.

Abstract translation: 在一个实施例中，电子器件包括反馈耦合电路级和补偿电路级。 反馈耦合级被配置为驱动负载，并且补偿级耦合到反馈耦合级，使得补偿和反馈耦合级的组合具有包括第一根和相对的第二根的频率响应， 取决于负载。 例如，这种电子电路的实施例可以是缺少大输出电容的低压差（LDO）电压调节器，用于形成用于稳定调节器的主极。 调节器包括产生和调节输出电压的反馈耦合级，并且包括被设计为使得调节器的频率响应包括跟踪调节器的非主导输出极的零的补偿级，使得输出 极不会不利地影响调节器的稳定性。