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公开(公告)号:US20160149695A1
公开(公告)日:2016-05-26
申请号:US15009696
申请日:2016-01-28
Applicant: STMicroelectronics International N.V.
Inventor: Abhishek CHOWDHARY , Vivek UPPAL , Alok KAUSHIK , Sajal Kumar MANDAL , Tapas NANDY , Sanjeev CHOPRA
CPC classification number: H04L7/0087 , H03L7/0807 , H03L7/091 , H04L7/0004 , H04L7/005 , H04L7/033 , H04L7/0331 , H04L7/0338 , H04L25/03057 , H04L43/022
Abstract: A method, algorithm, architecture, circuit and/or system that compensates for frequency difference in oversampled CDRs. The oversampled CDR uses a programmable divider whose division ratio is changed, for one or more cycles, from its usual division ratio, when accumulated phase movement in either direction exceeds a threshold. Accordingly, the elasticity buffer in oversampled CDRs can be made much smaller or entirely eliminated, resulting in less area, and reduced or eliminated dependence of max allowed burst size on ppm difference. The threshold can be kept programmable, and more than half unit interval, to provide robustness towards high frequency jitter.
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公开(公告)号:US20160119117A1
公开(公告)日:2016-04-28
申请号:US14986152
申请日:2015-12-31
Applicant: STMicroelectronics International N.V.
Inventor: Abhishek CHOWDHARY , Vivek UPPAL , Alok KAUSHIK , Sajal Kumar MANDAL , Tapas NANDY , Sanjeev CHOPRA
CPC classification number: H04L7/0087 , H03L7/0807 , H03L7/091 , H04L7/0004 , H04L7/005 , H04L7/033 , H04L7/0331 , H04L7/0338 , H04L25/03057 , H04L43/022
Abstract: A method, algorithm, architecture, circuit and/or system that compensates for frequency difference in oversampled CDRs. The oversampled CDR uses a programmable divider whose division ratio is changed, for one or more cycles, from its usual division ratio, when accumulated phase movement in either direction exceeds a threshold. Accordingly, the elasticity buffer in oversampled CDRs can be made much smaller or entirely eliminated, resulting in less area, and reduced or eliminated dependence of max allowed burst size on ppm difference. The threshold can be kept programmable, and more than half unit interval, to provide robustness towards high frequency jitter.
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