Power amplification device, especially with reduced input dynamic swing, in particular for a cellular mobile telephone
    1.
    发明申请
    Power amplification device, especially with reduced input dynamic swing, in particular for a cellular mobile telephone 有权
    功率放大装置,特别是具有减小的输入动态摆幅,特别是对于蜂窝移动电话

    公开(公告)号:US20040162045A1

    公开(公告)日:2004-08-19

    申请号:US10754464

    申请日:2004-01-09

    CPC classification number: H03M3/446 H03M3/43 H03M3/45 H03M3/454

    Abstract: A power amplification device includes an input for receiving a signal having a desired frequency band. The signal also has a transfer function associated therewith. The power amplification device further includes power amplification circuitry having an order greater than or equal to one, and signal amplifiers connected between the input and the power amplification circuitry. Each signal amplifier has a predetermined gain so that zeros of the transfer function are outside the desired frequency band.

    Abstract translation: 功率放大装置包括用于接收具有期望频带的信号的输入端。 该信号还具有与其相关联的传递函数。 功率放大装置还包括具有大于或等于1的量级的功率放大电路,以及连接在输入和功率放大电路之间的信号放大器。 每个信号放大器具有预定的增益,使得传递函数的零在所期望的频带之外。

    Method of correction of the error introduced by a multibit DAC incorporated in an ADC
    2.
    发明申请
    Method of correction of the error introduced by a multibit DAC incorporated in an ADC 有权
    校正由ADC中包含的多位DAC引入的误差的方法

    公开(公告)号:US20040227650A1

    公开(公告)日:2004-11-18

    申请号:US10764128

    申请日:2004-01-23

    CPC classification number: H03M1/0673 H03M1/168 H03M1/74 H03M3/464

    Abstract: A method corrects the error in an output digital signal (Out) of an analog/digital converter (ADC) (100), in which the error is introduced by a multibit digital/analog converter (DAC) (125) incorporated in the ADC. The method calculates (905) coefficients (pi,piri) of a linear combination of vectors of a vector space representative of the error introduced by the DAC; calculates (910-1, . . . , 910-7) the correlation of a signal (Res1d) containing the error introduced by the DAC, to extract an estimation of each vector; calculates a linear combination representative of the estimation of the error introduced by the DAC, and uses the estimation of the error introduced by the DAC to correct the ADC output signal.

    Abstract translation: 一种方法可以校正模数/数字转换器(ADC)(100)的输出数字信号(Out)中的误差,其中错误由并入ADC的多位数字/模拟转换器(125)引入。 该方法计算代表由DAC引入的误差的向量空间的向量的线性组合的(905)系数(pi,piri) 计算(910-1,...,910-7)包含由DAC引入的误差的信号(Res1d)的相关性,以提取每个向量的估计; 计算表示由DAC引入的误差的估计的线性组合,并且使用由DAC引入的误差的估计来校正ADC输出信号。

    Analog-to-digital converter with correction of offset errors
    3.
    发明申请
    Analog-to-digital converter with correction of offset errors 有权
    具有偏移误差校正的模数转换器

    公开(公告)号:US20040233081A1

    公开(公告)日:2004-11-25

    申请号:US10781570

    申请日:2004-02-18

    CPC classification number: H03M3/356 H03M3/424 H03M3/438

    Abstract: An analog-to-digital converter (200) includes at least one stage (105) for converting an analog input signal into a digital output signal using a parallel quantizer (115) comparing the analog input signal with a plurality of threshold values in parallel. The analog-to-digital converter includes, for at least one selected stage (105), an estimating circuit (210,220) for estimating an analog correction signal indicative of the mean value of a quantization error of the selected stage, and a compensating circuit (440i) for at least partially compensating an offset error of the parallel quantizer (105) in the selected stage according to the analog correction signal. A method and computing system are also provided.

    Abstract translation: 模拟数字转换器(200)包括至少一个级(105),用于使用并行量化器(115)将模拟输入信号转换成数字输出信号,并行量化器(115)将模拟输入信号与多个阈值进行并行比较。 对于至少一个所选择的级(105),模数转换器包括用于估计指示所选级的量化误差的平均值的模拟校正信号的估计电路(210,220),以及补偿电路 440i),用于根据模拟校正信号至少部分地补偿所选择的级中的并行量化器(105)的偏移误差。 还提供了一种方法和计算系统。

    Multistage analog-to-digital converter
    4.
    发明申请
    Multistage analog-to-digital converter 有权
    多级模数转换器

    公开(公告)号:US20040217896A1

    公开(公告)日:2004-11-04

    申请号:US10764133

    申请日:2004-01-23

    CPC classification number: H03M1/0641 H03M1/167

    Abstract: An analog-to-digital converter (200) with a pipeline architecture for converting an analog input signal into a digital output signal with a predefined resolution is proposed. The converter includes a plurality of stages (1053-1050) each one having means (110, 115) for converting an analog local signal into a digital local signal with a local resolution lower than said resolution, means (120, 125) for determining an analog residue indicative of a quantization error of the means for converting, and means (130) for amplifying the analog residue by an inter-stage gain corresponding to the local resolution to generate the analog local signal for a next stage, and further includes means (204) for combining the digital local signals of all the stages into the digital output signal weighting each digital local signal according to a digital weight depending on the corresponding inter-stage gain. In the converter of the invention, the means for combining includes, for at least one of the stages (1053), means (205-240) for dynamically estimating a digital correction signal indicative of an analog error of the corresponding inter-stage gain, and means (230) for controlling the digital weight according to the digital correction signal.

    Abstract translation: 提出了具有用于将模拟输入信号转换成具有预定分辨率的数字输出信号的流水线架构的模数转换器(200)。 所述转换器包括多个级(1053-1050),每个级具有用于将模拟本地信号转换成具有低于所述分辨率的局部分辨率的数字本地信号的装置(110,115),用于确定 表示用于转换的装置的量化误差的模拟残留以及用于通过对应于局部分辨率的级间增益来放大模拟残差的装置(130),以产生下一级的模拟本地信号,并且还包括装置 204),用于将所有级的数字本地信号组合成数字输出信号,根据相应的级间增益,根据数字权重对每个数字本地信号进行加权。 在本发明的转换器中,用于组合的装置包括用于动态估计指示相应级间增益的模拟误差的数字校正信号的装置(205-240)中的至少一个级(1053) 以及用于根据数字校正信号控制数字权重的装置(230)。

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