公开(公告)号：US10523189B2

公开(公告)日：2019-12-31

申请号：US16001682

申请日：2018-06-06

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Andrea Maino

IPC: H02P6/06 ,  H03K5/1532 ,  H02P27/08 ,  H03K7/08 ,  H03K17/16 ,  H03K17/689 ,  H02P7/03 ,  H02P7/02 ,  H02P7/025

Abstract: A ringing peak detector circuit includes an input buffer receives a pair of differential feedback signals indicating a drain-source voltage of the at least one low side electronic switch. The input buffer generates shifted differential feedback signals having a common mode voltage that is equal to approximately one half of the supply voltage. A peak detector circuit is coupled to the input buffer to receive the shifted differential voltage signals. The peak detector circuit detects a peak value of an oscillation on the inductive electric load and to generate an output signal indicating the detected peak value. A circuit generates a control signal based on the detected peak value and a maximum value, with the control signal being applied to the inductive electrical load driver to control switching of the at least one low side switch.

公开(公告)号：US20230324475A1

公开(公告)日：2023-10-12

申请号：US18335511

申请日：2023-06-15

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R31/64 ,  G01R27/26 ,  G01R31/00

CPC classification number: G01R31/64 ,  G01R27/2605 ,  G01R31/006

Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：US20230055745A1

公开(公告)日：2023-02-23

申请号：US17407747

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R31/64 ,  G01R27/26 ,  G01R31/00

Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：US11789046B2

公开(公告)日：2023-10-17

申请号：US17407725

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R19/10 ,  H03M1/12 ,  H03M3/00 ,  B60R21/017

CPC classification number: G01R19/10 ,  B60R21/0173 ,  H03M1/124 ,  H03M3/464 ,  H03M3/494

Abstract: A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.

公开(公告)号：US10009018B1

公开(公告)日：2018-06-26

申请号：US15634616

申请日：2017-06-27

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Andrea Maino

IPC: H02P6/06 ,  H03K5/1532 ,  H03K7/08 ,  H02P27/08

Abstract: A ringing peak detector module detects a ringing at the output of an inductive load driver including a bridge circuit containing high side and low side switches. A ringing peak detector receives differential feedback signals representative of the drain-source voltage of the low-side switch and detects a ringing peak of an oscillation of a current/voltage on the inductive load. A module compares said detected ringing peak with a maximum value and controls said driver by an error signal calculated as a function of the difference between said peak value and maximum value. The ringing peak detector module includes an input buffer module upstream of said peak detector circuit that shifts the differential feedback signals so a common mode of these signals is centered at a half-dynamic level of a supply voltage to provide correspondingly shifted voltages forming a shifted differential output corresponding to a steady state of the differential feedback signals.

公开(公告)号：US12241946B2

公开(公告)日：2025-03-04

申请号：US18335511

申请日：2023-06-15

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R31/64 ,  G01R27/26 ,  G01R31/00

Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：US20180287597A1

公开(公告)日：2018-10-04

申请号：US16001682

申请日：2018-06-06

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Andrea Maino

IPC: H03K5/1532 ,  H03K7/08 ,  H02P27/08

CPC classification number: H03K5/1532 ,  H02P7/02 ,  H02P7/025 ,  H02P7/04 ,  H02P27/085 ,  H03K7/08 ,  H03K17/165 ,  H03K17/689

Abstract: A ringing peak detector circuit includes an input buffer receives a pair of differential feedback signals indicating a drain-source voltage of the at least one low side electronic switch. The input buffer generates shifted differential feedback signals having a common mode voltage that is equal to approximately one half of the supply voltage. A peak detector circuit is coupled to the input buffer to receive the shifted differential voltage signals. The peak detector circuit detects a peak value of an oscillation on the inductive electric load and to generate an output signal indicating the detected peak value. A circuit generates a control signal based on the detected peak value and a maximum value, with the control signal being applied to the inductive electrical load driver to control switching of the at least one low side switch.

公开(公告)号：US11719761B2

公开(公告)日：2023-08-08

申请号：US17407747

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R31/64 ,  G01R27/26 ,  G01R31/00

CPC classification number: G01R31/64 ,  G01R27/2605 ,  G01R31/006

Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.

公开(公告)号：US20230054951A1

公开(公告)日：2023-02-23

申请号：US17407725

申请日：2021-08-20

Applicant: STMicroelectronics S.r.l.

Inventor： Davide Argento ,  Orazio Pennisi ,  Stefano Castorina ,  Vanni Poletto ,  Matteo Landini ,  Andrea Maino

IPC: G01R19/10 ,  H03M1/12 ,  H03M3/00 ,  B60R21/017

Abstract: A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.

公开(公告)号：US20180159518A1

公开(公告)日：2018-06-07

申请号：US15634616

申请日：2017-06-27

Applicant: STMicroelectronics S.r.l.

Inventor： Vanni Poletto ,  Andrea Maino

IPC: H03K5/1532 ,  H03K7/08 ,  H02P27/08

CPC classification number: H03K5/1532 ,  H02P7/02 ,  H02P7/025 ,  H02P7/04 ,  H02P27/085 ,  H03K7/08 ,  H03K17/165 ,  H03K17/689

Abstract: A ringing peak detector module detects a ringing at the output of an inductive load driver including a bridge circuit containing high side and low side switches. A ringing peak detector receives differential feedback signals representative of the drain-source voltage of the low-side switch and detects a ringing peak of an oscillation of a current/voltage on the inductive load. A module compares said detected ringing peak with a maximum value and controls said driver by an error signal calculated as a function of the difference between said peak value and maximum value. The ringing peak detector module includes an input buffer module upstream of said peak detector circuit that shifts the differential feedback signals so a common mode of these signals is centered at a half-dynamic level of a supply voltage to provide correspondingly shifted voltages forming a shifted differential output corresponding to a steady state of the differential feedback signals.