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公开(公告)号：US11789046B2
公开(公告)日：2023-10-17
申请号：US17407725
申请日：2021-08-20
Applicant: STMicroelectronics S.r.l.
Inventor： Davide Argento , Orazio Pennisi , Stefano Castorina , Vanni Poletto , Matteo Landini , Andrea Maino
IPC: G01R19/10 , H03M1/12 , H03M3/00 , B60R21/017
CPC classification number: G01R19/10 , B60R21/0173 , H03M1/124 , H03M3/464 , H03M3/494
Abstract: A system and method is provided for measuring a voltage drop at a node. In embodiments, a circuit includes an analog-to-digital converter, a current sink, and a controller. The input of the analog-to-digital converter and the input of the current sink is coupled to the node to be measured. A set point for the current sink is determined. The output of the analog-to-digital converter during the voltage drop is sampled. And a relative voltage drop value is computed by subtracting the sampled output of the analog-to-digital converter during the voltage drop from a sampled output of the analog-to-digital converter during a steady-state condition. The current sink operating at the set point during the steady-state condition and during the voltage drop.
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公开(公告)号：US12241946B2
公开(公告)日：2025-03-04
申请号：US18335511
申请日：2023-06-15
Applicant: STMicroelectronics S.r.l.
Inventor： Davide Argento , Orazio Pennisi , Stefano Castorina , Vanni Poletto , Matteo Landini , Andrea Maino
Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.
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公开(公告)号：US11557891B2
公开(公告)日：2023-01-17
申请号：US17454228
申请日：2021-11-09
Applicant: STMicroelectronics S.r.l.
Inventor： Nicola Errico , Antonio Giordano , Orazio Pennisi , Leonardo Pedone , Luca Finazzi
Abstract: A circuit includes comparator circuitry to sense a current through a load and compare the intensity of the current with a comparison threshold which can be set to a first, lower threshold value and a second, higher threshold value. Logic circuitry receives from the comparator circuitry a comparison signal having a first value or a second value based on whether the intensity is lower or higher than the comparison threshold. The logic circuitry is configured to assert a first overcurrent event signal or a second overcurrent event signal based on the comparison signal having the first value or the second value and the comparison threshold set to the first or second threshold value.
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公开(公告)号：US11892518B2
公开(公告)日：2024-02-06
申请号：US17368153
申请日：2021-07-06
Applicant: STMicroelectronics S.r.l.
Inventor： Orazio Pennisi , Valerio Bendotti , Vanni Poletto , Vittorio D'Angelo
IPC: G01R31/396 , G01R31/50 , G01R31/54 , B60L58/22 , H01M10/46 , H01M10/18 , H02J7/14 , H01M10/48 , G01R31/52
CPC classification number: G01R31/396 , B60L58/22 , G01R31/50 , G01R31/52 , G01R31/54 , H01M10/46 , H01M10/482 , H02J7/14
Abstract: A method of operating a control device includes performing an open load test or a current leakage test. The open load test includes activating a first current and then a second current and sensing with the first current and the second current activated, respectively, a first voltage drop and a second voltage drop between charge distribution pins and charge sensing pins of the control device. Respective differences are calculated between the first voltage drop and the second voltage drop sensed with the first current and the second current activated, respectively. These differences are compared with respective thresholds and an open circuit condition is declared as a result of the differences calculated reaching these thresholds.
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公开(公告)号：US11370321B2
公开(公告)日：2022-06-28
申请号：US16893729
申请日：2020-06-05
Applicant: STMicroelectronics S.r.l.
Inventor： Orazio Pennisi , Valerio Bendotti , Vittorio D'Angelo , Daniele Zella
Abstract: A method of operating a battery management system is disclosed. A first voltage drop is sensed between a first terminal of a first battery cell and a second terminal of the first battery cell and a second voltage drop is sensed between a charge distribution pin and the second terminal of the first battery cell. The charge distribution pin is coupled to the first terminal of the first battery cell through a resistor. A difference is calculated between the first voltage drop and the second voltage drop and a faulty condition is detected when Rn absolute value of the difference between the first voltage drop and the second voltage drop exceeds a threshold.
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Patent Agency Ranking
公开(公告)号：US11888304B2
公开(公告)日：2024-01-30
申请号：US16666989
申请日：2019-10-29
Applicant: STMicroelectronics S.r.l.
Inventor： Vittorio D'Angelo , Salvatore Cannavacciuolo , Sergio Lecce , Valerio Bendotti , Orazio Pennisi
CPC classification number: H02H1/063 , H02H9/046 , H02J7/0014
Abstract: An integrated circuit with a hot-plug protection circuit includes input pins and an output pin. The input pins are electrically coupled to a common node in the hot-plug protection circuit via respective electrical connections. The integrated circuit includes clamping circuitry coupled between the common node and the output pin, the clamping circuitry activatable as a result of a voltage spike applied across the clamping circuitry. The plurality of electrical connections and the clamping circuitry provide respective current discharge paths between the input pins in the input pins and the output pin, the respective current discharge paths configured to become conductive as a result of a voltage spike applied to any of the input pins in the plurality of input pins being transferred to the common node via the respective electrical connection in the plurality of electrical connections electrically coupling said any of said input pins to the common node.
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公开(公告)号：US20230324475A1
公开(公告)日：2023-10-12
申请号：US18335511
申请日：2023-06-15
Applicant: STMicroelectronics S.r.l.
Inventor： Davide Argento , Orazio Pennisi , Stefano Castorina , Vanni Poletto , Matteo Landini , Andrea Maino
CPC classification number: G01R31/64 , G01R27/2605 , G01R31/006
Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.
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公开(公告)号：US20230055745A1
公开(公告)日：2023-02-23
申请号：US17407747
申请日：2021-08-20
Applicant: STMicroelectronics S.r.l.
Inventor： Davide Argento , Orazio Pennisi , Stefano Castorina , Vanni Poletto , Matteo Landini , Andrea Maino
Abstract: A system and method for measuring a capacitance value of a capacitor are provided. In embodiments, a resistor is coupled to a terminal of the capacitor. A difference in voltage at the terminal between a first time and a second time during a discharge routine of the capacitor is measured. The discharge routine includes sinking a current through a discharge circuit coupled to the resistor from first to second. Integration of a difference in voltage at terminals of the resistor during the discharge routine between the first and second times is also measured. The capacitance value is computed based on the measured difference in voltage, the measured integration, and the resistance value of the resistor. The health of the capacitor is determined based on a difference between the computed capacitance value and a threshold value.
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公开(公告)号：US20220219544A1
公开(公告)日：2022-07-14
申请号：US17711543
申请日：2022-04-01
Applicant: STMicroelectronics S.r.l.
Inventor： Orazio Pennisi , Valerio Bendotti , Vittorio D'Angelo , Paolo Turbanti
Abstract: A method can be used to control a battery management system. A first voltage drop is sensed between a first terminal of a first battery cell and a second terminal of the first battery cell and a second voltage drop is sensed between a first terminal of a second battery cell and a second terminal of the second battery cell. A faulty condition is detected in the first battery cell or the second battery cell based on the first voltage drop or the second voltage drop. The first voltage drop is swapped for a first swapped voltage drop between a common terminal and the second terminal of the second battery cell.
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公开(公告)号：US11077755B2
公开(公告)日：2021-08-03
申请号：US16420875
申请日：2019-05-23
Applicant: STMicroelectronics S.r.l.
Inventor： Orazio Pennisi , Valerio Bendotti , Vanni Poletto
IPC: B60L3/00 , G01R31/385 , B60L50/64 , H02J7/00 , H03M3/00
Abstract: A circuit includes a differential stage configured to provide a differential output signal. An analog-to-digital converter is coupled to first and second output nodes of the differential stage. The analog-to-digital converter is configured to provide an output signal that is a function of the differential output signal from the differential stage. A multiplexer is configured to receive a differential input signal. The multiplexer includes a test switch switchable between a conductive state and a non-conductive state. In the conductive state, the test switch couples the first input node and the second input node of the differential stage. Test signal injection circuitry is activatable to force a differential current through the differential stage. The circuit is selectively switchable between an operational mode and a self-test mode.
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