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公开(公告)号:US20240120301A1
公开(公告)日:2024-04-11
申请号:US18544747
申请日:2023-12-19
Applicant: STMicroelectronics S.r.l.
Inventor: Simone Dario MARIANI , Elisabetta PIZZI , Daria DORIA
CPC classification number: H01L24/05 , H01L21/56 , H01L24/03 , H01L24/13 , H01L24/45 , H01L2224/02181 , H01L2224/0219 , H01L2224/03019 , H01L2224/0382 , H01L2224/05582 , H01L2224/05624 , H01L2224/05647
Abstract: A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passivation structure and is placed in contact with the upper surface of the bonding pad. An insulator material layer covers the conformal nitride layer and includes a second opening that extends through both the insulator material layer and the conformal nitride layer. A foot portion of the conformal nitride layer on the upper surface of the bonding pad is self-aligned with the second opening.
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公开(公告)号:US20190221652A1
公开(公告)日:2019-07-18
申请号:US16247358
申请日:2019-01-14
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Davide Giuseppe PATTI , Marco SAMBI , Fabrizio Fausto Renzo TOIA , Simone Dario MARIANI , Elisabetta PIZZI , Giuseppe BARILLARO
IPC: H01L29/423 , H01L29/78 , H01L29/739 , H01L29/66 , H01L21/265
CPC classification number: H01L29/7397 , H01L21/02238 , H01L21/02255 , H01L21/306 , H01L29/66348 , H01L29/66734 , H01L29/7813
Abstract: A vertical-conduction semiconductor electronic device includes: a semiconductor body; a body region in the semiconductor body; a source terminal in the body region; a drain terminal spatially opposite to the source region; and a trench gate extending in depth in the semiconductor body through the body region and the source region. The trench gate includes a dielectric region of porous silicon oxide buried in the semiconductor body, and a gate conductive region extending between the dielectric region of porous silicon oxide and the first side.
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公开(公告)号:US20230032635A1
公开(公告)日:2023-02-02
申请号:US17391192
申请日:2021-08-02
Applicant: STMicroelectronics S.r.l.
Inventor: Simone Dario MARIANI , Elisabetta PIZZI , Daria DORIA
Abstract: A back end of line (BEOL) structure for an integrated circuit chip includes a last metal structure providing a bonding pad. A passivation structure over the bonding pad includes a first opening extending exposing an upper surface of the bonding pad. A conformal nitride layer extends over the passivation structure and is placed in contact with the upper surface of the bonding pad. An insulator material layer covers the conformal nitride layer and includes a second opening that extends through both the insulator material layer and the conformal nitride layer. A foot portion of the conformal nitride layer on the upper surface of the bonding pad is self-aligned with the second opening.
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公开(公告)号:US20220384585A1
公开(公告)日:2022-12-01
申请号:US17824566
申请日:2022-05-25
Applicant: STMicroelectronics S.r.l.
Inventor: Elisabetta PIZZI , Dario RIPAMONTI , Matteo PATELMO , Fabrizio Fausto Renzo TOIA , Simone Dario MARIANI
Abstract: An integrated electronic circuit including: a dielectric body delimited by a front surface; A top conductive region of an integrated electronic circuit extend within a dielectric body having a front surface. A passivation structure including a bottom portion and a top portion laterally delimits an opening. The bottom portion extends on the front surface, and the top portion extends on the bottom portion. A field plate includes an internal portion and an external portion. The internal portion is located within the opening and extends on the top portion of the passivation structure. The external portion extends laterally with respect to the top portion of the passivation structure and contacts at a bottom one of: the dielectric body or the bottom portion of the passivation structure. The opening and the external portion are arranged on opposite sides of the top portion of the passivation structure.
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