公开(公告)号：US20230090664A1

公开(公告)日：2023-03-23

申请号：US17946298

申请日：2022-09-16

Applicant: STMicroelectronics S.r.l.

Inventor： Antonino MONDELLO ,  Michele Alessandro CARRANO ,  Riccardo CONDORELLI

IPC: G06F21/57 ,  G06F8/65 ,  G06F21/60

Abstract: The present disclosure relates to a method including executing, by an electronic device, a first firmware module stored in a volatile memory of the electronic device, the execution of the first firmware module causing an updated firmware key to be stored in a non-volatile memory of the electronic device, and uploading a second firmware module to the electronic device. The method also includes decrypting the second firmware module by a cryptographic processor of the electronic device based on the updated firmware key, and installing the decrypted second firmware module in the volatile memory of the electronic device at least partially overwriting the first firmware module.

公开(公告)号：US20230213578A1

公开(公告)日：2023-07-06

申请号：US18089764

申请日：2022-12-28

Applicant: STMicroelectronics S.r.l.

Inventor： Riccardo CONDORELLI ,  Antonino MONDELLO ,  Michele Alessandro CARRANO

IPC: G01R31/317 ,  G01R31/3173

CPC classification number: G01R31/31703 ,  G01R31/31725 ,  G01R31/3173

Abstract: A system-on-chip includes a process-voltage-temperature (PVT) sensor with a filter circuit that initiates a patterned digital signal and propagates the patterned digital signal in a manner responsive to variations in semiconductor material, operating supply voltage and operating temperature of the system-on-chip. A digital comparison circuit compares the initiated patterned digital signal and the propagated patterned digital signal. A warning signal is generated in response to the comparison where there is a detection of discrepancy between the initiated patterned digital signal and the propagated patterned digital signal.

公开(公告)号：US20180240523A1

公开(公告)日：2018-08-23

申请号：US15692158

申请日：2017-08-31

Applicant: STMicroelectronics S.r.l.

Inventor： Daniele MANGANO ,  Michele Alessandro CARRANO ,  Gaetano DI STEFANO ,  Roberto Sebastiano RUGGIRELLO

IPC: G11C16/10 ,  G11C8/20 ,  G11C13/00

CPC classification number: G11C16/10 ,  G06F12/0246 ,  G06F12/0868 ,  G06F2212/214 ,  G06F2212/461 ,  G06F2212/7201 ,  G06F2212/7207 ,  G06F2212/7209 ,  G11C8/20 ,  G11C13/004 ,  G11C13/0069

Abstract: A non-volatile data memory space for a range of user addresses is provided by means of a range of non-volatile flash memory locations for writing data. The range of flash memory locations for writing data is larger (e.g., 4 KB v. 100 B) than the range of user addresses. Data for a same user address may thus be written in different flash memory locations in a range of flash memory locations with data storage endurance correspondingly improved.