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公开(公告)号：US09419634B1
公开(公告)日：2016-08-16
申请号：US14752226
申请日：2015-06-26
Inventor： Sebastien Dedieu , Abhirup Lahiri
CPC classification number: H03K3/0315 , H03K3/013 , H03L1/02 , H03L7/00 , H03L7/0805 , H03L7/24
Abstract: A multiple phase oscillator includes a master oscillator that injection locks a first ring oscillator. The free-running frequency of the first ring oscillator is adjustable through a control signal. A second ring oscillator has a same structure as the first ring oscillator and is connected to operate in a free-running mode. The free-running frequency of the second ring oscillator is adjustable through the control signal. A control loop senses the output of the second ring oscillator and adjusts the control signal so that the free-running frequency of the second ring oscillator matches a desired value.
Abstract translation: 多相振荡器包括一个主振荡器，该主振荡器注入锁定第一个环形振荡器。 第一个环形振荡器的自由运行频率可通过控制信号进行调节。 第二环形振荡器具有与第一环形振荡器相同的结构，并连接以工作在自由运行模式。 第二个环形振荡器的自由运行频率可以通过控制信号进行调节。 控制回路感测第二环形振荡器的输出并调整控制信号，使得第二环形振荡器的自由运行频率与期望值相匹配。
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公开(公告)号：US20180129239A1
公开(公告)日：2018-05-10
申请号：US15866651
申请日：2018-01-10
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri
Abstract: A reference voltage generator circuit includes a circuit that generates a complementary to absolute temperature (CTAT) voltage and a proportional to absolute temperature (PTAT) current. An output current circuit generates, from the PTAT current, a sink PTAT current sunk from a first node and a source PTAT current sourced to a second node, wherein the sink and source PTAT currents are equal. A resistor is directly connected between the first node and the second node. A divider circuit divides the CTAT voltage to generate a divided CTAT voltage applied to the first node. A voltage at the second node is a fractional bandgap reference voltage equal to a sum of the divided CTAT voltage and a voltage drop across the resistor that is proportional to a resistor current equal to the sink and source PTAT currents.
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3.发明授权公开(公告)号：US09000857B2
公开(公告)日：2015-04-07
申请号：US13919195
申请日：2013-06-17
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri , Nitin Gupta
CPC classification number: H03L7/085 , H03L7/0995
Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.
Abstract translation: 电路产生可以去除由电源信号引入的VCO（即电源侧噪声）中的噪声的补偿信号。 该电路包括串联连接的两个晶体管。 电阻器连接在第一晶体管的栅极和电源信号之间，电容器连接在第二晶体管的栅极和电源信号之间。 该电路被设计成使得一个晶体管的跨导大于或等于第二晶体管的跨导的两倍。 补偿信号通过补偿VCO中的电容器的电容器提供给VCO的内部电源节点。 在内部电源节点，补偿信号消除（或大大降低）由电源信号噪声引入的噪声，导致VCO噪声较小的输出信号。
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公开(公告)号：US20160006442A1
公开(公告)日：2016-01-07
申请号：US14323794
申请日：2014-07-03
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Abhirup Lahiri , Nitin Gupta
Abstract: According to an embodiment, a circuit includes a first charge pump configured to generate a first current at a first node, a second charge pump configured to generate a second current at a second node, a loop filter coupled between the first and second nodes, the loop filter including a first filter path coupled to the first node, a second filter path coupled to the second node, and an isolation buffer interposed between the first and second filter paths. The second current at the second node is different than the first current at the first node. The circuit further includes an oscillator configured to apply a first gain to an output of the first filter path and a second gain to an output of the second filter path.
Abstract translation: 根据实施例，电路包括被配置为在第一节点处产生第一电流的第一电荷泵，被配置为在第二节点处产生第二电流的第二电荷泵，耦合在第一和第二节点之间的环路滤波器， 环路滤波器，包括耦合到第一节点的第一滤波器路径，耦合到第二节点的第二滤波器路径以及插在第一和第二滤波器路径之间的隔离缓冲器。 第二节点处的第二个电流与第一节点处的第一个电流不同。 该电路还包括一个振荡器，被配置为对第一滤波器路径的输出施加第一增益，并将第二增益应用于第二滤波器路径的输出。
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公开(公告)号：US20140103900A1
公开(公告)日：2014-04-17
申请号：US13650829
申请日：2012-10-12
Applicant: STMICROELECTRONICS INTERNATIONAL N.V.
Inventor： Abhirup Lahiri
IPC: G05F3/02
Abstract: A PTAT circuit includes a first, second, third, and fourth transistors plus a resistor. The first and second transistors have control terminals coupled to each other. The third and fourth transistors have control terminals coupled to each other. The third transistor sources a first current to the first transistor and the fourth transistor sources a second current to the second transistor. The resistor is coupled at a node to the second transistor. A current source circuit sources additional current into the node that is derived from the first and second currents. In one implementation, the additional current is a scaled mirror of the second current. In another implementation, the additional current is a scaled mirror of the sum of the first and second currents. An output current is obtained by mirroring one of the first-third currents. A band-gap output voltage is obtained by applying the additional current across a resistance.
Abstract translation: PTAT电路包括第一，第二，第三和第四晶体管加上电阻器。 第一和第二晶体管具有彼此耦合的控制端子。 第三和第四晶体管具有彼此耦合的控制端子。 第三晶体管向第一晶体管馈送第一电流，而第四晶体管将第二电流馈送至第二晶体管。 电阻器在一个节点处耦合到第二晶体管。 电流源电路将来自第一和第二电流的额外电流输入到节点中。 在一个实现中，附加电流是第二电流的缩放镜。 在另一实施方案中，附加电流是第一和第二电流之和的经比例的镜。 通过镜像第一至第三电流之一获得输出电流。 通过在电阻上施加附加电流来获得带隙输出电压。
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Patent Agency Ranking
6.发明授权公开(公告)号：US10185338B1
公开(公告)日：2019-01-22
申请号：US15848130
申请日：2017-12-20
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri , Nitin Bansal , Shrestha Bansal
Abstract: A digital low drop-out regulator circuit includes transistor switches that are selectively actuated in response to a comparison of an output voltage at an output node to corresponding tap reference voltages. A dynamic reference voltage correction circuit operates to shift voltage levels of the tap reference voltages in response to a difference between the output voltage at the output node and an input reference voltage.
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公开(公告)号：US10027333B2
公开(公告)日：2018-07-17
申请号：US15356335
申请日：2016-11-18
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri , Nitin Gupta , Gagan Midha
Abstract: An embodiment circuit includes a first charge pump configured to generate a first current at a first node, and a second charge pump configured to generate a second current at a second node. The circuit further includes an isolation buffer coupled between the first node and the second node and an adder having a first input coupled to the second node. The circuit additionally includes an auxiliary charge pump configured to generate a third current at a second input of the adder, and an oscillator having an input coupled to an output of the adder.
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公开(公告)号：US09146574B2
公开(公告)日：2015-09-29
申请号：US13784681
申请日：2013-03-04
Applicant: STMicroelectronics International N.V.
Inventor： Nitin Gupta , Abhirup Lahiri
Abstract: A current mirror circuit provides a current to drive a load. A noise cancelling circuit is provided to keep the load current constant in spite of variations in the supply voltage. The noise cancelling circuit includes an auxiliary current path which branches from the load current path. The length-to-width ratios of transistors of the circuit are selected to provide the desired noise cancellation while maintaining device stability.
Abstract translation: 电流镜电路提供电流来驱动负载。 提供噪声消除电路以保持负载电流恒定，尽管电源电压的变化。 噪声消除电路包括从负载电流路径分支的辅助电流路径。 选择电路的晶体管的长宽比来提供期望的噪声消除，同时保持器件的稳定性。
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9.发明申请MID-BAND PSRR CIRCUIT FOR VOLTAGE CONTROLLED OSCILLATORS IN PHASE LOCK LOOP 有权用于电压控制振荡器的相位锁定环路的中频PSRR电路公开(公告)号：US20140368281A1
公开(公告)日：2014-12-18
申请号：US13919195
申请日：2013-06-17
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri , Nitin Gupta
CPC classification number: H03L7/085 , H03L7/0995
Abstract: A circuit generates a compensation signal that can remove noise in a VCO introduced by a supply signal (i.e., supply-side noise). The circuit includes two transistors connected in series. A resistor is connected between the gate of the first transistor and the supply signal, and a capacitor is connected between the gate of the second transistor and the supply signal. The circuit is designed so that the transconductance of one transistor is greater than or equal to twice the transconductance of a second transistor. The compensation signal is supplied through a capacitor, which compensates for capacitors in a VCO, to an internal supply node of the VCO. At the internal supply node, the compensation signal removes (or greatly reduces) the noise introduced by the supply signal noise, resulting in a less-noisy output signal from the VCO.
Abstract translation: 电路产生可以去除由电源信号引入的VCO（即电源侧噪声）中的噪声的补偿信号。 该电路包括串联连接的两个晶体管。 电阻器连接在第一晶体管的栅极和电源信号之间，电容器连接在第二晶体管的栅极和电源信号之间。 该电路被设计成使得一个晶体管的跨导大于或等于第二晶体管的跨导的两倍。 补偿信号通过补偿VCO中的电容器的电容器提供给VCO的内部电源节点。 在内部电源节点，补偿信号消除（或大大降低）由电源信号噪声引入的噪声，导致VCO噪声较小的输出信号。
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公开(公告)号：US09898030B2
公开(公告)日：2018-02-20
申请号：US15207732
申请日：2016-07-12
Applicant: STMicroelectronics International N.V.
Inventor： Abhirup Lahiri
Abstract: A reference voltage generator circuit includes a circuit that generates a complementary to absolute temperature (CTAT) voltage and a proportional to absolute temperature (PTAT) current. An output current circuit generates, from the PTAT current, a sink PTAT current sunk from a first node and a source PTAT current sourced to a second node, wherein the sink and source PTAT currents are equal. A resistor is directly connected between the first node and the second node. A divider circuit divides the CTAT voltage to generate a divided CTAT voltage applied to the first node. A voltage at the second node is a fractional bandgap reference voltage equal to a sum of the divided CTAT voltage and a voltage drop across the resistor that is proportional to a resistor current equal to the sink and source PTAT currents.
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