-
1.发明公开公开(公告)号：US20240289417A1
公开(公告)日：2024-08-29
申请号：US18405219
申请日：2024-01-05
发明人： Takeshi KAWASAKI
IPC分类号： G06F17/16
CPC分类号： G06F17/16
摘要： A calculation method is executed by a computer to execute a process. The process includes acquiring a condition for calculating a first matrix of a reactance circuit having N ports Pi to which a high frequency signal is input or output, wherein i is an integer of 1 to N, and N is an integer of 2 or more, and calculating, based on the condition, the first matrix including an admittance matrix or an impedance matrix, wherein j is an integer of 1 to N, θij is −π/2 or +π/2, and an element Γij of the admittance matrix or the impedance matrix is represented by Γij=Γij×exp (θij).
-
公开(公告)号：US20210151396A1
公开(公告)日：2021-05-20
申请号：US17105492
申请日：2020-11-25
发明人： Mikoto NAKAMURA , Takeshi KAWASAKI
IPC分类号： H01L23/66 , H01L23/528 , H01L23/00 , H01P3/08 , H03F3/195
摘要： A radio-frequency (RF) apparatus that reduces signal reflections at input and output terminals includes a semiconductor chip mounted on an assembly base upside down. The semiconductor chip includes first to third metal layers and a top metal layer that provides a top ground layer and a pad. The pad is connected to the input or output terminals on the assembly base and extracts a signal line and a stub line in the third metal layer. The semiconductor chip further includes an inner ground layer formed in the second metal layer. The inner ground layer and the signal line pulled out from the pad and formed in the third metal layer form a micro-strip line.
-
公开(公告)号：US20240142504A1
公开(公告)日：2024-05-02
申请号：US18373401
申请日：2023-09-27
发明人： Takeshi KAWASAKI
CPC分类号： G01R27/04 , G01R27/2623 , G01R31/2607
摘要： A calculation method includes acquiring N matrices corresponding to N sets, each of N matrices being a matrix of a circuit network including first and second terminals, each of N sets being a set of first voltage applied to first terminal and second voltage applied to second terminal, and extracting values of L parameters based on N matrices using a first model of an intrinsic circuit and a second model of a distributed constant circuit. First model is represented by a function of at least one of first voltage and second voltage, each of L/2 impedance elements includes first end connected to one of first to sixth terminals, and second end connected to terminal other than the one of first to sixth terminals, and second model is represented by values of L parameters including two real number parameters related to impedance of each of L/2 impedance elements.
-
4.发明公开公开(公告)号：US20230267258A1
公开(公告)日：2023-08-24
申请号：US18099295
申请日：2023-01-20
发明人： Takeshi KAWASAKI , Hajime IGARASHI
IPC分类号： G06F30/39
CPC分类号： G06F30/39
摘要： A pattern generation device includes a memory and a processor coupled to the memory. The processor is configured to generate pattern data corresponding to a pattern of a metal layer based on a generation condition, determine whether the generated pattern data satisfies a predetermined condition, return to generate the pattern data when the predetermined condition is not satisfied, calculate a characteristic of the pattern or an element or circuit having the pattern when a high-frequency signal is inputted to a first portion and a high-frequency signal is outputted from a second portion by performing an electromagnetic field analysis based on the pattern data when the predetermined condition is satisfied, determine whether the calculated characteristic is within a target range, change the generation condition when the calculated characteristic is not within the target range, and return to generate the pattern data after changing the generation condition.
-
公开(公告)号：US20210367559A1
公开(公告)日：2021-11-25
申请号：US17319879
申请日：2021-05-13
发明人： Takeshi KAWASAKI
摘要： A power amplifier circuit is a Doherty type. A peak amplifier has a first transistor and a second transistor. A first source terminal is connected to a first constant potential line. A first drain terminal and a second source terminal are connected to a first node. A second drain terminal is connected to a second constant potential line having a higher potential than the first constant potential line. A first control terminal is connected to a first bias voltage application circuit, and an input signal is input to the first control terminal via a first alternating current coupling circuit. A second control terminal is connected to a second bias voltage application circuit and is connected to the first node via a second alternating current coupling circuit. The first node is connected to the first constant potential line via a third alternating current coupling circuit.
-
公开(公告)号：US20150349070A1
公开(公告)日：2015-12-03
申请号：US14724598
申请日：2015-05-28
发明人： Takeshi KAWASAKI
IPC分类号： H01L29/417 , H01L29/78 , H01L23/50 , H01L27/088 , H01L27/095 , H01L29/06 , H01L29/423 , H01L29/812
CPC分类号： H01L23/50 , H01L23/482 , H01L23/4824 , H01L29/41758 , H01L29/778 , H01L29/7827 , H01L29/812 , H01L2224/11
摘要： A semiconductor device is disclosed. The semiconductor comprises a field effect transistor (FET) provided in a substrate, the FET including a plurality of gates, sources, and drains each extending in parallel along a longitudinal direction of the gates, the sources, and the drains; an upper electrode provided above the substrate with an insulating layer therebetween, the upper electrode having an opening where the FET is disposed, and a plurality of source extractions each connected to respective sources through via structures passing the insulating layer and to the upper electrode, the source extractions extending along the longitudinal direction.
摘要翻译： 公开了一种半导体器件。 半导体包括设置在衬底中的场效应晶体管（FET），所述FET包括沿栅极，源极和漏极的纵向方向平行延伸的多个栅极，源极和漏极; 上部电极，设置在所述基板上方，在其间具有绝缘层，所述上部电极具有设置所述FET的开口，以及多个源极抽出，每个源极抽出通过穿过所述绝缘层和上部电极的通孔结构连接到各个源， 源提取沿纵向方向延伸。
-
公开(公告)号：US20220271719A1
公开(公告)日：2022-08-25
申请号：US17557594
申请日：2021-12-21
发明人： Takeshi KAWASAKI
摘要： A semiconductor device includes an input terminal, an output terminal, an amplifier with an input, and a predistorter with an input electrically coupled to the input terminal and with an output electrically coupled to the input of the amplifier. The predistorter includes a first transistor.
-
公开(公告)号：US20210135637A1
公开(公告)日：2021-05-06
申请号：US16673075
申请日：2019-11-04
发明人： Takeshi KAWASAKI
摘要： An multistage amplifier includes first to third FETs, a drain of the second FET is connected to a gate of the third FET in an AC manner, a source thereof is grounded in a DC manner, a drain of the first FET is connected to a gate of the second FET in an AC manner, a source thereof is grounded in a DC manner, a gate thereof receives a high frequency signal, a drain of the third FET receives a bias current and outputs an amplified signal, a source thereof is grounded in an AC manner, the drains of the first and second FETs are connected to the source of the third FET in a DC manner via a transmission line having an electrical length of λ/4 when a wavelength of the high frequency signal is λ, and a size of third FET is greater than other FETs.
-
公开(公告)号：US20180122755A1
公开(公告)日：2018-05-03
申请号：US15797944
申请日：2017-10-30
发明人： Mikoto NAKAMURA , Takeshi KAWASAKI
IPC分类号： H01L23/66 , H01L23/528 , H03F3/195 , H01L23/00 , H01P3/08
CPC分类号： H01L23/66 , H01L23/49811 , H01L23/49827 , H01L23/49838 , H01L23/5226 , H01L23/528 , H01L24/14 , H01L24/16 , H01L2223/6627 , H01L2223/6644 , H01L2224/14131 , H01L2224/16013 , H01L2224/16227 , H01L2924/1421 , H01L2924/19032 , H01P3/081 , H01P5/028 , H03F3/195 , H03F2200/451
摘要： A radio-frequency (RF) apparatus that reduces signal reflections at input and output terminals is disclosed. The RF apparatus includes an assembly base and a semiconductor chip mounted on the assembly base in upside down. The semiconductor chip includes first to third metal layers and a top metal layer that provides a top ground layer and a pad. The pad is connected to the input or output terminals on the assembly base and extracts a signal line and a stub line in the third metal layer, where lines are transferred to the first metal layer. The semiconductor chip further includes an inner ground layer formed in the second metal line. The inner ground layer and the signal line just pulled out from the pad and formed in the third metal layer form a micro-strip line.
-
公开(公告)号：US20140091863A1
公开(公告)日：2014-04-03
申请号：US14039130
申请日：2013-09-27
发明人： Takeshi KAWASAKI
IPC分类号： H03F3/16
CPC分类号： H03F3/16 , H03F1/0283 , H03F3/193
摘要： A current reuse amplifier is disclosed. The amplifier includes a first field effect transistor (FET); and a second FET with a source coupled with a gate of the second FET and a drain of the first FET through a first resistor in a DC mode but floated from a ground in an AC mode. A feature of the current reuse amplifier is that the amplifier further includes a shunt block connected in the source of the second FET to shunt a DC current flowing in the second FET to the ground. A DC current flowing in the first FET is smaller than a DC current flowing in the second FET, and the first FET has a size smaller than a size of the second FET.
摘要翻译： 公开了一种电流复用放大器。 放大器包括第一场效应晶体管（FET）; 以及第二FET，其源极与第二FET的栅极和第一FET的漏极通过DC模式的第一电阻器耦合，但是以交流模式从地面浮置。 电流再利用放大器的特征在于，放大器还包括连接在第二FET源极中的分流块，以将流过第二FET的直流电流分流到地。 在第一FET中流动的直流电流小于在第二FET中流动的直流电流，并且第一FET的尺寸小于第二FET的尺寸。
-
-
-
-
-
-
-
-
-
搜索结果
10 条记录 (耗时 0.016 秒)
