公开(公告)号：US20130069278A1

公开(公告)日：2013-03-21

申请号：US13424427

申请日：2012-03-20

申请人： Sachiko Kobayashi ,  Kazuhiro Takahata ,  Yingkang Zhang ,  Masafumi Asano ,  Shigeki Nojima

发明人： Sachiko Kobayashi ,  Kazuhiro Takahata ,  Yingkang Zhang ,  Masafumi Asano ,  Shigeki Nojima

IPC分类号： B29C67/00

CPC分类号： B29C59/026 ,  B29C59/002 ,  B29C71/04 ,  B29K2105/246 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002

摘要： According to one embodiment, a pattern formation device that presses a template that includes a concave and convex part onto a transferring object and that forms a pattern in which a shape of the concave and convex part is transferred is provided. The device includes: a calculation part; an adjustment part; and a transfer. The calculation part calculates, using design information of the pattern, the distribution of force applied to the pattern at a time of releasing the template pressed onto the transferring object from the transferring object. The adjustment part adjusts forming conditions of the pattern in order to uniformly approach the distribution of force calculated by the calculation part. The transfer part transfers the shape of the concave and convex part to the transferring object according to the forming conditions adjusted by the adjustment part.

摘要翻译： 根据一个实施例，提供了一种图案形成装置，其将包括凹凸部分的模板按压到转印体上并形成其中转移了凹凸部分的形状的图案。 该装置包括：计算部分; 调整部分; 和转移。 所述计算部使用所述图案的设计信息，计算从所述转印体上释放压印在所述转印体上的所述模板时施加到所述图案的力的分布。 调整部调整图案的成形条件，以均匀地接近由计算部计算出的力的分布。 转印部件根据由调节部件调整的成形条件将凹凸部的形状转印到转印体上。

公开(公告)号：US08871408B2

公开(公告)日：2014-10-28

申请号：US13604076

申请日：2012-09-05

申请人： Yoko Takekawa ,  Masafumi Asano ,  Yingkang Zhang ,  Kazuhiro Takahata ,  Tomoko Ojima

发明人： Yoko Takekawa ,  Masafumi Asano ,  Yingkang Zhang ,  Kazuhiro Takahata ,  Tomoko Ojima

IPC分类号： G03F1/68

CPC分类号： G03F7/0002

摘要： According to one embodiment, a mask pattern creation method includes extracting an area, in which a DSA material is directed self-assembled to form a DSA pattern, from a design pattern area based on a design pattern and information on the DSA material. The method also includes creating a guide pattern that causes the DSA pattern to be formed in the area based on the design pattern, the information on the DSA material, the area, and a design constraint when forming the guide pattern. The method further includes creating a mask pattern of the guide pattern using the guide pattern.

摘要翻译： 根据一个实施例，掩模图案创建方法包括基于设计图案和关于DSA材料的信息，从设计图案区域提取其中DSA材料被自组装以形成DSA图案的区域。 该方法还包括在形成引导图案时，基于设计图案，关于DSA材料的信息，面积以及设计约束，创建导致DSA图案在该区域中形成的引导图案。 该方法还包括使用引导图案创建引导图案的掩模图案。

公开(公告)号：US20120318561A1

公开(公告)日：2012-12-20

申请号：US13424112

申请日：2012-03-19

申请人： Kazuhiro TAKAHATA ,  Masafumi Asano ,  Yingkang Zhang ,  Tomoko Ojima

发明人： Kazuhiro TAKAHATA ,  Masafumi Asano ,  Yingkang Zhang ,  Tomoko Ojima

IPC分类号： H05K3/00 ,  H05K1/00

CPC分类号： H01L21/0271 ,  B82Y10/00 ,  B82Y40/00 ,  G03F7/0002 ,  H01L21/31144 ,  Y10T29/49124

摘要： According to one embodiment, a pattern formation method includes: providing a first member; providing a second member; forming a third pattern; and removing a convex portion of a second pattern. The first member is provided on a major surface of a substrate and cured in a state of a template having a first pattern being brought into contact to form the second pattern including a convex portion in a first region on the major surface. The second member is provided in a concave portion adjacent to the convex portion of the second pattern. The third pattern is formed in the second member provided on a second region on the major surface. The removing the convex portion includes removing the convex portion of the second pattern to leave the third pattern and a fourth pattern formed by the second member provided in the concave portion on the major surface.

摘要翻译： 根据一个实施例，图案形成方法包括：提供第一构件; 提供第二名成员; 形成第三种模式; 以及去除第二图案的凸部。 第一构件设置在基板的主表面上，并且在具有第一图案的模板的状态下固化，以形成包括主表面上的第一区域中的凸部的第二图案。 第二构件设置在与第二图案的凸部相邻的凹部中。 第三图案形成在设置在主表面上的第二区域上的第二构件中。 去除凸部包括去除第二图案的凸部以留下第三图案，以及由设置在主表面上的凹部中的第二构件形成的第四图案。

公开(公告)号：US20120018780A1

公开(公告)日：2012-01-26

申请号：US13075665

申请日：2011-03-30

申请人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

发明人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

IPC分类号： H01L29/772 ,  H01L21/28

CPC分类号： H01L27/11521

摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided via a gate insulating film above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a protection film covering the side face of the gate electrode. The method can include etching the semiconductor substrate using the gate electrode as a mask to form the isolation groove. The side face of the gate electrode is covered with the protection film. The method can include forming a first insulating film by oxidizing a surface of the isolation groove to fill a bottom portion of the isolation groove. In addition, the method can include forming a second insulating film on the first insulating film to fill an upper portion of the isolation groove including the side face of the gate electrode.

摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 作为设置在相邻栅电极之间的隔离槽的内壁的一部分，包括平行于通过半导体基板上方的栅极绝缘膜设置的多个栅电极的沟道方向的侧面。 该方法可以包括形成覆盖栅电极的侧面的保护膜。 该方法可以包括使用栅电极作为掩模来蚀刻半导体衬底以形成隔离槽。 栅电极的侧面被保护膜覆盖。 该方法可以包括通过氧化隔离槽的表面来填充隔离槽的底部来形成第一绝缘膜。 此外，该方法可以包括在第一绝缘膜上形成第二绝缘膜以填充包括栅电极的侧面的隔离槽的上部。

公开(公告)号：US20120018783A1

公开(公告)日：2012-01-26

申请号：US13117525

申请日：2011-05-27

申请人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

发明人： Kazuaki Iwasawa ,  Shigeo Kondo ,  Hiroshi Akahori ,  Kiyohito Nishihara ,  Yingkang Zhang ,  Masaki Kondo ,  Hidenobu Nagashima ,  Takashi Ichikawa

IPC分类号： H01L29/772 ,  H01L21/28

CPC分类号： H01L29/1083 ,  H01L21/84 ,  H01L27/11526 ,  H01L27/11529 ,  H01L27/1207 ,  H01L29/66825 ,  H01L29/7881

摘要： According to one embodiment, a method is disclosed for manufacturing a semiconductor device. A side face parallel to a channel direction of a plurality of gate electrodes provided above a semiconductor substrate is included as a part of an inner wall of an isolation groove provided between the adjacent gate electrodes. The method can include forming a first isolation groove penetrating through a conductive film serving as the gate electrode to reach the semiconductor substrate. The method can include forming a protection film covering a side wall of the first isolation groove including a side face of the gate electrode. The method can include forming a second isolation groove by etching the semiconductor substrate exposed to a bottom surface of the first isolation groove. The method can include oxidizing an inner surface of the second isolation groove provided on each of both sides of the gate electrode to form first insulating films, which are connected to each other under the gate electrode. In addition, the method can include filling an inside of the first isolation groove and an inside of the second isolation groove with a second insulating film.

摘要翻译： 根据一个实施例，公开了一种用于制造半导体器件的方法。 作为设置在相邻的栅电极之间的隔离槽的内壁的一部分，包括平行于设置在半导体基板上方的多个栅电极的沟道方向的侧面。 该方法可以包括形成穿过用作栅电极的导电膜的第一隔离槽，以到达半导体衬底。 该方法可以包括形成覆盖包括栅电极的侧面的第一隔离槽的侧壁的保护膜。 该方法可以包括通过蚀刻暴露于第一隔离槽的底表面的半导体衬底来形成第二隔离槽。 该方法可以包括氧化设置在栅电极的两侧的每一侧上的第二隔离槽的内表面，以形成第一绝缘膜，它们彼此连接在栅极下方。 此外，该方法可以包括用第二绝缘膜填充第一隔离槽的内部和第二隔离槽的内部。

公开(公告)号：US20120007163A1

公开(公告)日：2012-01-12

申请号：US13052531

申请日：2011-03-21

申请人： Hiroshi Akahori ,  Kiyohito Nishihara ,  Masaki Kondo ,  Yingkang Zhang ,  Shigeo Kondo ,  Hidenobu Nagashima ,  Kazuaki Iwasawa ,  Takashi Ichikawa

发明人： Hiroshi Akahori ,  Kiyohito Nishihara ,  Masaki Kondo ,  Yingkang Zhang ,  Shigeo Kondo ,  Hidenobu Nagashima ,  Kazuaki Iwasawa ,  Takashi Ichikawa

IPC分类号： H01L29/788

CPC分类号： H01L29/7883 ,  H01L27/11521

摘要： According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.

摘要翻译： 根据一个实施例，非易失性存储器件包括衬底，第一和第二隧道绝缘膜，第一和第二浮栅电极，栅间绝缘膜和控制栅电极。 衬底具有通过元件隔离沟槽彼此隔离的第一和第二有源区。 第一和第二隧道绝缘膜分别位于第一和第二有源区中。 第一和第二浮栅电极分别位于第一和第二隧道绝缘膜上。 隔间绝缘膜包括第一绝缘材料的第一绝缘层，第一绝缘层上的第二绝缘材料的电子陷阱层和电子陷阱层上的第一绝缘材料的第二绝缘层。 控制栅电极位于隔间绝缘膜上。

公开(公告)号：US08723245B2

公开(公告)日：2014-05-13

申请号：US13052531

申请日：2011-03-21

申请人： Hiroshi Akahori ,  Kiyohito Nishihara ,  Masaki Kondo ,  Yingkang Zhang ,  Shigeo Kondo ,  Hidenobu Nagashima ,  Kazuaki Iwasawa ,  Takashi Ichikawa

发明人： Hiroshi Akahori ,  Kiyohito Nishihara ,  Masaki Kondo ,  Yingkang Zhang ,  Shigeo Kondo ,  Hidenobu Nagashima ,  Kazuaki Iwasawa ,  Takashi Ichikawa

IPC分类号： H01L29/788

CPC分类号： H01L29/7883 ,  H01L27/11521

摘要： According to one embodiment, a nonvolatile memory device includes a substrate, first and second tunnel insulating films, first and second floating gate electrodes, an intergate insulating film and a control gate electrode. The substrate has first and second active regions isolated from each other by an element isolation trench. The first and second tunnel insulating films are located in the first and second active regions, respectively. The first and second floating gate electrodes are located on the first and second tunnel insulating films, respectively. The intergate insulating film includes a first insulating layer of a first insulating material, an electron trap layer of a second insulating material on the first insulating layer, and a second insulating layer of the first insulating material on the electron trap layer. The control gate electrode is located on the intergate insulating film.

摘要翻译： 根据一个实施例，非易失性存储器件包括衬底，第一和第二隧道绝缘膜，第一和第二浮栅电极，栅间绝缘膜和控制栅电极。 衬底具有通过元件隔离沟槽彼此隔离的第一和第二有源区。 第一和第二隧道绝缘膜分别位于第一和第二有源区中。 第一和第二浮栅电极分别位于第一和第二隧道绝缘膜上。 隔间绝缘膜包括第一绝缘材料的第一绝缘层，第一绝缘层上的第二绝缘材料的电子陷阱层和电子陷阱层上的第一绝缘材料的第二绝缘层。 控制栅电极位于隔间绝缘膜上。