Packaged microelectronic imagers and methods of packaging microelectronic imagers
    1.
    发明授权
    Packaged microelectronic imagers and methods of packaging microelectronic imagers 有权
    封装的微电子成像器和包装微电子成像器的方法

    公开(公告)号:US07294897B2

    公开(公告)日:2007-11-13

    申请号:US10879398

    申请日:2004-06-29

    IPC分类号: H01L31/203

    摘要: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了微电子成像器,用于封装微电子成像器的方法,以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中,微电子成像管芯可以包括微电子衬底,集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道,沉积到通道中并与衬底接触的电介质衬垫,沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

    Systems and methods for testing microfeature devices
    2.
    发明授权
    Systems and methods for testing microfeature devices 有权
    用于测试微功能设备的系统和方法

    公开(公告)号:US07385412B2

    公开(公告)日:2008-06-10

    申请号:US11409060

    申请日:2006-04-24

    IPC分类号: G01R31/02 G01R31/26 H01L27/00

    CPC分类号: G01R31/2635 G01R31/2831

    摘要: Systems and methods for testing microelectronic imagers and microfeature devices are disclosed herein. In one embodiment, a method includes providing a microfeature workpiece including a substrate having a front side, a backside, and a plurality of microelectronic dies. The individual dies include an integrated circuit and a plurality of contact pads at the backside of the substrate operatively coupled to the integrated circuit. The method includes contacting individual contact pads with corresponding pins of a probe card. The method further includes testing the dies. In another embodiment, the individual dies can further comprise an image sensor at the front side of the substrate and operatively coupled to the integrated circuit. The image sensors are illuminated while the dies are tested.

    摘要翻译: 本文公开了用于测试微电子成像器和微特征器件的系统和方法。 在一个实施例中,一种方法包括提供微功能工件,其包括具有正面,背面和多个微电子管芯的衬底。 各个管芯包括集成电路和在衬底的背面可操作地耦合到集成电路的多个接触焊盘。 该方法包括使各个接触垫与探针卡的相应引脚接触。 该方法还包括测试模具。 在另一个实施例中,各个管芯还可以包括在衬底的前侧的图像传感器,并可操作地耦合到集成电路。 在测试模具时,图像传感器被照亮。

    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS
    4.
    发明申请
    PACKAGED MICROELECTRONIC IMAGERS AND METHODS OF PACKAGING MICROELECTRONIC IMAGERS 有权
    包装微电子图像和包装微电子图像的方法

    公开(公告)号:US20110089539A1

    公开(公告)日:2011-04-21

    申请号:US12977686

    申请日:2010-12-23

    IPC分类号: H01L23/544 H01L23/48

    摘要: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了在微电子器件和微电子器件中形成导电晶片间互连的方法。 在一个实施例中,微电子器件可以包括具有集成电路的单片微电子衬底,其前侧具有集成电路互连。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道,沉积到通道中并与衬底接触的电介质衬垫,沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

    Packaged microelectronic imagers and methods of packaging microelectronic imagers
    7.
    发明授权
    Packaged microelectronic imagers and methods of packaging microelectronic imagers 有权
    封装的微电子成像器和包装微电子成像器的方法

    公开(公告)号:US08053857B2

    公开(公告)日:2011-11-08

    申请号:US12977686

    申请日:2010-12-23

    IPC分类号: H01L31/0203

    摘要: Methods for forming electrically conductive through-wafer interconnects in microelectronic devices and microelectronic devices are disclosed herein. In one embodiment, a microelectronic device can include a monolithic microelectronic substrate with an integrated circuit has a front side with integrated circuit interconnects thereon. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了在微电子器件和微电子器件中形成导电晶片间互连的方法。 在一个实施例中,微电子器件可以包括具有集成电路的单片微电子衬底,其前侧具有集成电路互连。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道,沉积到通道中并与衬底接触的电介质衬垫,沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。

    Packaged microelectronic imagers and methods of packaging microelectronic imagers
    8.
    发明授权
    Packaged microelectronic imagers and methods of packaging microelectronic imagers 有权
    封装的微电子成像器和包装微电子成像器的方法

    公开(公告)号:US07858429B2

    公开(公告)日:2010-12-28

    申请号:US11863087

    申请日:2007-09-27

    IPC分类号: H01L21/00 G02F1/13

    摘要: Microelectronic imagers, methods for packaging microelectronic imagers, and methods for forming electrically conductive through-wafer interconnects in microelectronic imagers are disclosed herein. In one embodiment, a microelectronic imaging die can include a microelectronic substrate, an integrated circuit, and an image sensor electrically coupled to the integrated circuit. A bond-pad is carried by the substrate and electrically coupled to the integrated circuit. An electrically conductive through-wafer interconnect extends through the substrate and is in contact with the bond-pad. The interconnect can include a passage extending completely through the substrate and the bond-pad, a dielectric liner deposited into the passage and in contact with the substrate, first and second conductive layers deposited onto at least a portion of the dielectric liner, and a conductive fill material deposited into the passage over at least a portion of the second conductive layer and electrically coupled to the bond-pad.

    摘要翻译: 本文公开了微电子成像器,用于封装微电子成像器的方法,以及用于在微电子成像器中形成导电晶片间互连的方法。 在一个实施例中,微电子成像管芯可以包括微电子衬底,集成电路和电耦合到集成电路的图像传感器。 接合焊盘由衬底承载并电耦合到集成电路。 导电晶片互连延伸穿过衬底并与接合焊盘接触。 互连可以包括完全延伸穿过衬底和接合焊盘的通道,沉积到通道中并与衬底接触的电介质衬垫,沉积在电介质衬垫的至少一部分上的第一和第二导电层以及导电 在第二导电层的至少一部分上沉积到通道中并且电耦合到接合焊盘的填充材料。