公开(公告)号：US20150070643A1

公开(公告)日：2015-03-12

申请号：US14195051

申请日：2014-03-03

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Neung Kim ,  Yu-Gwang Jeong ,  Sang-Gab Kim ,  Su-Bin Bae ,  Shin-Il Choi

IPC: H01L27/12 ,  G02F1/1343

CPC classification number: H01L27/1225 ,  G02F1/134309 ,  G02F1/136213 ,  G02F2201/50 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1259

Abstract: A display apparatus includes: a substrate defining transistor and wiring areas; a thin film transistor in the transistor area and including a gate electrode, an active layer, and source and drain electrodes; an etch prevention layer in the transistor area, absent in the wiring area and covering the active layer, and first and second contact holes defined in the etch prevention layer and through which the active layer is electrically coupled to the source and drain electrodes; a first wiring layer in the wiring area; a first insulating layer which covers the gate electrode and the first wiring layer, and a third contact hole defined in the first insulating layer in the wiring area and exposing the first wiring layer; and a second wiring layer on the first insulating layer and in the wiring area, and electrically coupled to the first wiring layer via the third contact hole.

Abstract translation: 显示装置包括：限定晶体管和布线区域的基板; 晶体管区域中的薄膜晶体管，并且包括栅电极，有源层以及源极和漏极; 晶体管区域中的防蚀层，在布线区域中不存在并覆盖有源层，以及限定在防蚀层中的第一和第二接触孔，有源层电耦合到源电极和漏电极; 布线区域中的第一布线层; 覆盖所述栅电极和所述第一布线层的第一绝缘层和限定在所述布线区域中的所述第一绝缘层中的第三接触孔，并暴露所述第一布线层; 以及在所述第一绝缘层和所述布线区域中的第二布线层，并且经由所述第三接触孔电耦合到所述第一布线层。

公开(公告)号：US09236401B2

公开(公告)日：2016-01-12

申请号：US14195051

申请日：2014-03-03

Applicant: Samsung Display Co., Ltd.

Inventor： Jae-Neung Kim ,  Yu-Gwang Jeong ,  Sang-Gab Kim ,  Su-Bin Bae ,  Shin-Il Choi

IPC: G02F1/1343 ,  G02F1/1362 ,  H01L27/12

CPC classification number: H01L27/1225 ,  G02F1/134309 ,  G02F1/136213 ,  G02F2201/50 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1259

Abstract: A display apparatus includes: a substrate defining transistor and wiring areas; a thin film transistor in the transistor area and including a gate electrode, an active layer, and source and drain electrodes; an etch prevention layer in the transistor area, absent in the wiring area and covering the active layer, and first and second contact holes defined in the etch prevention layer and through which the active layer is electrically coupled to the source and drain electrodes; a first wiring layer in the wiring area; a first insulating layer which covers the gate electrode and the first wiring layer, and a third contact hole defined in the first insulating layer in the wiring area and exposing the first wiring layer; and a second wiring layer on the first insulating layer and in the wiring area, and electrically coupled to the first wiring layer via the third contact hole.

Abstract translation: 显示装置包括：限定晶体管和布线区域的基板; 晶体管区域中的薄膜晶体管，并且包括栅电极，有源层以及源极和漏极; 晶体管区域中的防蚀层，在布线区域中不存在并覆盖有源层，以及限定在防蚀层中的第一和第二接触孔，有源层电耦合到源电极和漏电极; 布线区域中的第一布线层; 覆盖所述栅电极和所述第一布线层的第一绝缘层和限定在所述布线区域中的所述第一绝缘层中的第三接触孔，并暴露所述第一布线层; 以及在所述第一绝缘层和所述布线区域中的第二布线层，并且经由所述第三接触孔电耦合到所述第一布线层。

公开(公告)号：US10521057B2

公开(公告)日：2019-12-31

申请号：US14852641

申请日：2015-09-14

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Sung-Kyun Park ,  Kyung-Seop Kim ,  Jae-Neung Kim ,  Cheol-Kyu Kim ,  Ki-Hyun Cho ,  Sun-Haeng Cho

IPC: G06F3/044

Abstract: A method of forming a touch screen panel including first sensing electrodes in an active region of a substrate and arranged along a first direction and second sensing electrodes arranged along a second direction intersecting the first direction, the method including forming the first sensing electrodes and first connection patterns, the first connection patterns connecting the first sensing electrodes along the first direction; forming an insulating pattern capping the first sensing electrodes and the first connection patterns so that the first sensing electrodes and the first connection patterns are not exposed; and forming the second sensing electrodes between the first sensing electrodes, and second connection patterns on the insulating pattern, the second connection patterns connecting the second sensing electrodes along the second direction.

公开(公告)号：US09484362B2

公开(公告)日：2016-11-01

申请号：US14262761

申请日：2014-04-27

Applicant: Samsung Display Co., LTD.

Inventor： Dae-Ho Kim ,  Hyun-Jae Na ,  Jae-Neung Kim ,  Yu-Gwang Jeong ,  Myoung-Geun Cha ,  Sang-Gab Kim

IPC: H01L29/04 ,  H01L27/12 ,  H01L29/417

CPC classification number: H01L27/1225 ,  H01L27/1244 ,  H01L27/1248 ,  H01L29/41733

Abstract: A display substrate includes an active pattern, a gate electrode, a first insulation layer and a pixel electrode. The active pattern is disposed on a base substrate. The active pattern includes a metal oxide semiconductor. The gate electrode overlaps the active pattern. The first insulation layer covers the gate electrode and the active pattern, and a contact hole is defined in the first insulation layer. The pixel electrode is electrically connected to the active pattern via the contact hole penetrating the first insulation layer. A first angle defined by a bottom surface of the first insulation layer and a sidewall of the first insulation layer exposed by the contact hole is between about 30° and about 50°.

Abstract translation: 显示基板包括有源图案，栅电极，第一绝缘层和像素电极。 有源图案设置在基底基板上。 有源图案包括金属氧化物半导体。 栅电极与有源图案重叠。 第一绝缘层覆盖栅电极和有源图案，并且在第一绝缘层中限定接触孔。 像素电极经由穿过第一绝缘层的接触孔电连接到有源图案。 由第一绝缘层的底表面和由接触孔露出的第一绝缘层的侧壁限定的第一角度在约30°至约50°之间。

公开(公告)号：US09443879B2

公开(公告)日：2016-09-13

申请号：US14455113

申请日：2014-08-08

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Yu-Gwang Jeong ,  Shin-Il Choi ,  Su-Bin Bae ,  Dae-Ho Kim ,  Sang-Gab Kim ,  Jae-Neung Kim

IPC: H01L27/12 ,  H01L21/311 ,  H01L21/768

CPC classification number: H01L27/124 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76832 ,  H01L27/1259

Abstract: A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole.

Abstract translation: 显示基板包括基底基板，基底基板上的公共线，覆盖公共线的第一绝缘层，并具有第一绝缘材料，第一绝缘层上的导电图案，包括源电极和漏电极， 覆盖漏电极和公共线的第二绝缘层，并且包括具有第二绝缘材料的下第二绝缘层和具有第一绝缘材料的上第二绝缘层，第一电极，通过第一接触孔电连接到漏电极 以及通过第一绝缘层和第二绝缘层中的第二接触孔与公共线电连接的第二电极。 漏电极上的上，下第二绝缘层分别具有形成第一接触孔的第一孔和第二孔。

公开(公告)号：US09224764B2

公开(公告)日：2015-12-29

申请号：US14468633

申请日：2014-08-26

Applicant: Samsung Display Co., LTD.

Inventor： Jae-Neung Kim ,  Yu-Gwang Jeong ,  Shin-Il Choi ,  Dae-Ho Kim ,  Myoung-Geun Cha ,  Sang-Gab Kim ,  Jung-Ha Son

IPC: H01L27/14 ,  H01L27/12

CPC classification number: H01L27/1262 ,  H01L27/1218 ,  H01L27/124

Abstract: A display substrate includes a data pad on a base substrate, a first buffer layer which covers the data pad, a second buffer layer pattern which is disposed on the first buffer layer and separated from the data pad in a plan view, an active layer on the second buffer layer pattern, a gate insulation layer pattern on the active layer, both ends of the active layer exposed by the gate insulation layer pattern, and a gate electrode on the gate insulation layer pattern.

Abstract translation: 显示基板包括在基底基板上的数据焊盘，覆盖数据焊盘的第一缓冲层，布置在第一缓冲层上并在平面图中与数据焊盘分离的第二缓冲层图案，活性层 第二缓冲层图案，有源层上的栅极绝缘层图案，由栅极绝缘层图案曝光的有源层的两端以及栅极绝缘层图案上的栅极电极。

公开(公告)号：US20150179802A1

公开(公告)日：2015-06-25

申请号：US14527632

申请日：2014-10-29

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jae-Neung Kim ,  Shin-Il Choi ,  Yu-Gwang Jeong ,  Su-Bin Bae ,  Dae-Ho Kim ,  Sang-Gab Kim

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/41733 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/78606

Abstract: A thin film transistor includes a gate electrode, an active pattern over the gate electrode and including an oxide semiconductor, an etch-stop layer covering the active pattern, a source electrode on the etch-stop layer, a drain electrode on the etch-stop layer and spaced from the source electrode, and an active protection pattern between the etch-stop layer and the active pattern and electrically coupled to the source electrode and the drain electrode.

Abstract translation: 薄膜晶体管包括栅电极，栅电极上的有源图案，并且包括氧化物半导体，覆盖有源图案的蚀刻停止层，蚀刻停止层上的源电极，蚀刻停止层上的漏电极 层，并且与源电极间隔开，以及蚀刻停止层和有源图案之间的电耦合到源电极和漏电极的有源保护图案。

公开(公告)号：US08791460B2

公开(公告)日：2014-07-29

申请号：US13693423

申请日：2012-12-04

Applicant: Samsung Display Co., Ltd.

Inventor： Dae-Ho Kim ,  Hyun-Jae Na ,  Yong-Su Lee ,  Myoung-Geun Cha ,  Yoon-Ho Khang ,  Sang-Gab Kim ,  Jae-Neung Kim ,  Se-Hwan Yu

IPC: H01L29/10

CPC classification number: H01L29/786 ,  H01L29/4908 ,  H01L29/516 ,  H01L29/66477 ,  H01L29/78618 ,  H01L29/78693

Abstract: A thin film transistor substrate includes a base substrate, an active pattern, a gate insulation pattern and a gate electrode. The active pattern is disposed on the base substrate. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode. The gate insulation pattern and the gate electrode overlap with the channel. The gate insulation pattern is disposed between the channel and the gate electrode. The source electrode and the drain electrode each include a fluorine deposition layer.

Abstract translation: 薄膜晶体管基板包括基底基板，有源图案，栅极绝缘图案和栅电极。 有源图案设置在基底基板上。 有源图案包括源电极，漏电极和设置在源电极和漏极之间的沟道。 栅极绝缘图案和栅电极与沟道重叠。 栅极绝缘图案设置在沟道和栅电极之间。 源电极和漏极各自包括氟沉积层。