公开(公告)号：US20170092704A1

公开(公告)日：2017-03-30

申请号：US15377794

申请日：2016-12-13

Applicant: Samsung Display Co., Ltd

Inventor： Myoung-Geun CHA ,  Sang-Ho PARK ,  Hyun-Jae NA ,  Yoon-Ho KHANG ,  Dae-Ho KIM

IPC: H01L27/32 ,  G02F1/1343 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1362

CPC classification number: H01L27/3232 ,  G02F1/134309 ,  G02F1/136286 ,  G02F1/1368 ,  G02F2001/136295 ,  G02F2201/123 ,  H01L21/477 ,  H01L27/1225 ,  H01L27/124 ,  H01L27/1259 ,  H01L27/1288 ,  H01L27/3262 ,  H01L27/3276 ,  H01L29/45 ,  H01L29/66969 ,  H01L29/7869

Abstract: A thin film transistor (TFT), method of manufacturing the TFT and a flat panel display having the TFT are disclosed. In one aspect, the TFT comprises a substrate and an active layer formed over the substrate, wherein the active layer is formed of oxide semiconductor, and wherein the active layer includes two opposing sides. The TFT also comprises source and drain regions formed at the opposing sides of the active layer, a first insulating layer formed over the active layer, a gate electrode formed over the active layer, a second insulating layer formed covering the first insulation layer and the gate electrode, and a first conductive layer formed on the source and drain regions and contacting the second insulating layer.

公开(公告)号：US20150053989A1

公开(公告)日：2015-02-26

申请号：US14455113

申请日：2014-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Yu-Gwang JEONG ,  Shin-Il CHOI ,  Su-Bin BAE ,  Dae-Ho KIM ,  Sang-Gab KIM ,  Jae-Neung KIM

IPC: H01L27/12 ,  H01L21/02 ,  H01L21/3065

CPC classification number: H01L27/124 ,  H01L21/31116 ,  H01L21/76804 ,  H01L21/76832 ,  H01L27/1259

Abstract: A display substrate includes a base substrate, a common line on the base substrate, a first insulation layer covering the common line and having a first insulating material, a conductive pattern on the first insulation layer and including a source electrode and a drain electrode, a second insulation layer covering the drain electrode and the common line, and including a lower second insulation layer having a second insulating material and an upper second insulation layer having the first insulating material, a first electrode electrically connected to the drain electrode through a first contact hole in the second insulation layer, and a second electrode electrically connected to the common line through a second contact hole in the first and second insulation layers. The upper and lower second insulation layers on the drain electrode have a first hole and a second hole respectively that form the first contact hole.

Abstract translation: 显示基板包括基底基板，基底基板上的公共线，覆盖公共线的第一绝缘层，并具有第一绝缘材料，第一绝缘层上的导电图案，包括源电极和漏电极， 覆盖漏电极和公共线的第二绝缘层，并且包括具有第二绝缘材料的下第二绝缘层和具有第一绝缘材料的上第二绝缘层，第一电极，通过第一接触孔电连接到漏电极 以及通过第一绝缘层和第二绝缘层中的第二接触孔与公共线电连接的第二电极。 漏电极上的上，下第二绝缘层分别具有形成第一接触孔的第一孔和第二孔。

公开(公告)号：US20150162363A1

公开(公告)日：2015-06-11

申请号：US14468633

申请日：2014-08-26

Applicant: Samsung Display Co., LTD.

Inventor： Jae-Neung KIM ,  Yu-Gwang JEONG ,  Shin-Il CHOI ,  Dae-Ho KIM ,  Myoung-Geun CHA ,  Sang-Gab KIM ,  Jung-Ha SON

IPC: H01L27/12

CPC classification number: H01L27/1262 ,  H01L27/1218 ,  H01L27/124

Abstract: A display substrate includes a data pad on a base substrate, a first buffer layer which covers the data pad, a second buffer layer pattern which is disposed on the first buffer layer and separated from the data pad in a plan view, an active layer on the second buffer layer pattern, a gate insulation layer pattern on the active layer, both ends of the active layer exposed by the gate insulation layer pattern, and a gate electrode on the gate insulation layer pattern.

Abstract translation: 显示基板包括在基底基板上的数据焊盘，覆盖数据焊盘的第一缓冲层，布置在第一缓冲层上并在平面图中与数据焊盘分离的第二缓冲层图案，活性层 第二缓冲层图案，有源层上的栅极绝缘层图案，由栅极绝缘层图案曝光的有源层的两端以及栅极绝缘层图案上的栅极电极。

公开(公告)号：US20150097179A1

公开(公告)日：2015-04-09

申请号：US14262761

申请日：2014-04-27

Applicant: Samsung Display Co., LTD.

Inventor： Dae-Ho KIM ,  Hyun-Jae NA ,  Jae-Neung KIM ,  Yu-Gwang JEONG ,  Myoung-Geun CHA ,  Sang-Gab KIM

IPC: H01L27/12

CPC classification number: H01L27/1225 ,  H01L27/1244 ,  H01L27/1248 ,  H01L29/41733

Abstract: A display substrate includes an active pattern, a gate electrode, a first insulation layer and a pixel electrode. The active pattern is disposed on a base substrate. The active pattern includes a metal oxide semiconductor. The gate electrode overlaps the active pattern. The first insulation layer covers the gate electrode and the active pattern, and a contact hole is defined in the first insulation layer. The pixel electrode is electrically connected to the active pattern via the contact hole penetrating the first insulation layer. A first angle defined by a bottom surface of the first insulation layer and a sidewall of the first insulation layer exposed by the contact hole is between about 30° and about 50°.

Abstract translation: 显示基板包括有源图案，栅电极，第一绝缘层和像素电极。 有源图案设置在基底基板上。 有源图案包括金属氧化物半导体。 栅电极与有源图案重叠。 第一绝缘层覆盖栅电极和有源图案，并且在第一绝缘层中限定接触孔。 像素电极经由穿过第一绝缘层的接触孔电连接到有源图案。 由第一绝缘层的底表面和由接触孔露出的第一绝缘层的侧壁限定的第一角度在约30°至约50°之间。

公开(公告)号：US20140054579A1

公开(公告)日：2014-02-27

申请号：US13693423

申请日：2012-12-04

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Dae-Ho KIM ,  Hyun-Jae NA ,  Yong-Su LEE ,  Myoung-Geun CHA ,  Yoon-Ho KHANG ,  Sang-Gab KIM ,  Jae-Neung KIM ,  Se-Hwan YU

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/786 ,  H01L29/4908 ,  H01L29/516 ,  H01L29/66477 ,  H01L29/78618 ,  H01L29/78693

Abstract: A thin film transistor substrate includes a base substrate, an active pattern, a gate insulation pattern and a gate electrode. The active pattern is disposed on the base substrate. The active pattern includes a source electrode, a drain electrode, and a channel disposed between the source electrode and the drain electrode. The gate insulation pattern and the gate electrode overlap with the channel. The gate insulation pattern is disposed between the channel and the gate electrode. The source electrode and the drain electrode each include a fluorine deposition layer.

Abstract translation: 薄膜晶体管基板包括基底基板，有源图案，栅极绝缘图案和栅电极。 有源图案设置在基底基板上。 有源图案包括源电极，漏电极和设置在源电极和漏极之间的沟道。 栅极绝缘图案和栅电极与沟道重叠。 栅极绝缘图案设置在沟道和栅电极之间。 源电极和漏极各自包括氟沉积层。