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公开(公告)号:US11903254B2
公开(公告)日:2024-02-13
申请号:US17739010
申请日:2022-05-06
发明人: Ji Eun Choi , Deok Hoi Kim , Jeong Hwan Kim , Jong Baek Seon , Jun Cheol Shin , Jae Hak Lee
IPC分类号: H10K59/12 , H10K59/121 , H10K59/123 , H10K59/126 , H10K77/10 , H01L27/12 , H01L29/24 , H01L29/786 , H01L29/66 , H10K102/00
CPC分类号: H10K59/1213 , H10K59/123 , H10K59/126 , H10K59/1216 , H10K77/111 , H01L27/1225 , H01L27/1251 , H01L27/1255 , H01L27/1259 , H01L29/24 , H01L29/66757 , H01L29/66969 , H01L29/7869 , H01L29/78633 , H01L29/78648 , H01L29/78675 , H10K59/1201 , H10K2102/311
摘要: A display device includes: a base substrate having a display region including a first region and a second region, and a non-display region; a first semiconductor layer including polysilicon at the second region; a first conductive layer on a first insulating layer, and including a bottom gate electrode at the first region and a second-first gate electrode at the second region; a second semiconductor layer including an oxide on a second insulating layer at the first region; a second conductive layer on a third insulating layer, and including a top gate electrode at the first region and a second-second gate electrode at the second region; and a third conductive layer on a fourth insulating layer, and including a first source electrode and a first drain electrode connected to the second semiconductor layer, and a second source electrode and a second drain electrode connected to the first semiconductor layer.
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公开(公告)号:US10997881B2
公开(公告)日:2021-05-04
申请号:US15861582
申请日:2018-01-03
发明人: Jun Cheol Shin , Won Jang Ki , Mi Jung Kim , Sang Cheon Han
摘要: A display device includes a base substrate which includes a display area and a peripheral area, the peripheral area including a bending area; a first test signal line and a second test signal line which are located on the peripheral area; a lower insulating layer which is located on the first test signal line and the second test signal line; a first test connection pattern which is located on the lower insulating layer and connected to the first test signal line; a second test connection pattern which is located on the lower insulating layer, spaced apart from the first test connection pattern, and connected to the second test signal line; an upper insulating layer; and a first crack detection line which is located on the upper insulating layer, is connected to the first and second test connection patterns, and has at least a portion overlapping the bending area.
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公开(公告)号:US11342401B2
公开(公告)日:2022-05-24
申请号:US16839796
申请日:2020-04-03
发明人: Ji Eun Choi , Deok Hoi Kim , Jeong Hwan Kim , Jong Baek Seon , Jun Cheol Shin , Jae Hak Lee
摘要: A display device includes: a base substrate having a display region including a first region and a second region, and a non-display region; a first semiconductor layer including polysilicon at the second region; a first conductive layer on a first insulating layer, and including a bottom gate electrode at the first region and a second-first gate electrode at the second region; a second semiconductor layer including an oxide on a second insulating layer at the first region; a second conductive layer on a third insulating layer, and including a top gate electrode at the first region and a second-second gate electrode at the second region; and a third conductive layer on a fourth insulating layer, and including a first source electrode and a first drain electrode connected to the second semiconductor layer, and a second source electrode and a second drain electrode connected to the first semiconductor layer.
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