公开(公告)号：US20150108489A1

公开(公告)日：2015-04-23

申请号：US14579542

申请日：2014-12-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Joo-Han KIM ,  Ki-Yong SONG ,  Dong-Ju YANG ,  Hee-Joon KIM ,  Yeo-Geon YOON ,  Sung-Hen CHO ,  Chang-Hoon KIM ,  Jae-Hong KIM ,  Yu-Gwang JEONG ,  Ki-Yeup LEE ,  Sang-Gab KIM ,  Yun-Jong YEO ,  Shin-Il CHOI ,  Ji-Young PARK

IPC: H01L23/00 ,  H01L27/12

CPC classification number: H01L24/05 ,  G02F1/136227 ,  H01L27/12 ,  H01L27/1214 ,  H01L27/124 ,  H01L2224/04042 ,  H01L2924/14 ,  H01L2924/1426 ,  H01L2924/00

Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.

Abstract translation: 公开了布线的接触部分及其制造方法。 根据实施例的布线的接触部分包括：基板; 设置在所述基板上的导电层; 设置在所述导电层上并具有接触孔的层间绝缘层; 设置在所述导电层上并填充所述接触孔的金属层; 以及透明电极，设置在所述层间绝缘层上并连接到所述金属层，其中所述层间绝缘层包括下绝缘层和设置在所述下绝缘层上的上绝缘层，所述下绝缘层在所述接触孔处被底切， 并且金属层填充在下绝缘层被切下的部分。

公开(公告)号：US20130270565A1

公开(公告)日：2013-10-17

申请号：US13907132

申请日：2013-05-31

Applicant: Samsung Display Co., Ltd.

Inventor： Chang-Oh JEONG ,  Woo-Sung SOHN ,  Dong-Gyu KIM ,  Shi-Yul KIM ,  Ki-Yeup LEE ,  Jean-Ho SONG

IPC: H01L33/16

CPC classification number: H01L33/16 ,  H01L27/124 ,  H01L27/1288

Abstract: A thin film transistor array panel is provided and includes a gate line, a gate insulating layer covering the gate line, a semiconductor layer disposed on the gate insulating layer, and a data line and a drain electrode disposed on the semiconductor layer. The data line and the drain electrode have a dual-layered structure including a lower layer and an upper layer with the lower layer having a first portion protruded outside the upper layer and the semiconductor layer having a second portion protruded outside the edge of the lower layer.

Abstract translation: 提供了一种薄膜晶体管阵列面板，包括栅极线，覆盖栅极线的栅极绝缘层，设置在栅极绝缘层上的半导体层，以及设置在半导体层上的数据线和漏电极。 数据线和漏电极具有包括下层和上层的双层结构，其中下层具有突出于上层之外的第一部分，并且半导体层具有突出于下层边缘外侧的第二部分 。