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公开(公告)号：US20190072993A1
公开(公告)日：2019-03-07
申请号：US15986209
申请日：2018-05-22
发明人： Byeong Hak JO , Jeong Hoon KIM , Kyu Jin CHOI , Jong Ok HA
IPC分类号： G05F3/26
摘要： A reference current generating circuit includes a current source circuit configured to generate a reference current based on an internal resistor; and a compensation circuit configured to comprise a first compensation circuit comprising a first compensation resistor and a second compensation resistor, and the first compensation resistor and the second compensation resistor are configured to convert the reference current into a first output current and compensate for process variation of the current source circuit.
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公开(公告)号：US20180123528A1
公开(公告)日：2018-05-03
申请号：US15479323
申请日：2017-04-05
发明人： Byeong Hak JO , Jong Ok HA , Jeong Hoon KIM , Youn Suk KIM
CPC分类号： H03F1/32 , H03F1/0216 , H03F1/302 , H03F3/19 , H03F3/21 , H03F3/245 , H03F2200/102 , H03F2200/18 , H03F2200/451
摘要： An envelope tracking current bias circuit of a power amplifier circuit including a power amplifier includes a first current source circuit configured to generate a first bias current based on a reference voltage, a second current source circuit configured to generate a second bias current based on an envelope voltage of an input signal, and a bias current generator configured to generate a first envelope tracking bias current based on the first bias current and the second bias current, and supply the first envelope tracking bias current to the power amplifier circuit to reduce amplitude modulation-phase modulation (AM-PM) distortion of the power amplifier circuit.
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公开(公告)号：US20140184556A1
公开(公告)日：2014-07-03
申请号：US13795406
申请日：2013-03-12
发明人： Byeong Hak JO , Yong II Kwon , Moon Suk Jeong , Tah Joon Park , Kang Joo Kim , Hyun Suk Lee
CPC分类号： G06F3/0416 , G06F3/044
摘要： There are provided a touch sensing apparatus and a touch sensing method. The touch sensing apparatus includes: a panel unit including a plurality of driving electrodes and a plurality of sensing electrodes; a driving circuit unit applying driving signals to the plurality of driving electrodes, respectively; a sensing circuit unit measuring a change in capacitance of node capacitors generated in intersections of the plurality of the driving electrodes and the plurality of sensing electrodes; a signal conversion unit generating a first digital signal based on the change in capacitance; and a calculation unit determining a touch according to the first digital signal, wherein the driving circuit unit and the sensing circuit unit are operated by an input voltage, and the signal conversion unit and the calculation unit are operated by a low voltage drop out (LDO) voltage generated by decreasing the input voltage.
摘要翻译： 提供了触摸感测装置和触摸感测方法。 触摸感测装置包括：面板单元，包括多个驱动电极和多个感测电极; 驱动电路单元，分别向多个驱动电极施加驱动信号; 感测电路单元，测量在所述多个驱动电极和所述多个感测电极的交叉点中产生的节点电容器的电容变化; 信号转换单元，基于电容的变化产生第一数字信号; 以及计算单元，根据所述第一数字信号确定触摸，其中所述驱动电路单元和所述感测电路单元由输入电压操作，并且所述信号转换单元和所述计算单元通过低压降（LDO）操作 ）电压通过降低输入电压而产生。
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公开(公告)号：US20140146000A1
公开(公告)日：2014-05-29
申请号：US13761826
申请日：2013-02-07
发明人： Byeong Hak JO , Moon Suk Jeong , Tah Joon Park
IPC分类号： G06F3/044
CPC分类号： G06F3/044
摘要： There are provided a touch sensing device and a touchscreen device, the touch sensing device including a driving circuit unit sequentially applying a driving signal to a plurality of respective driving electrodes, a sensing circuit unit connected to a plurality of sensing electrodes and measuring changes in capacitance in node capacitors formed by the plurality of driving electrodes and the plurality of sensing electrodes, and a noise removing unit providing a preset reference voltage to a driving electrode to which the driving signal is not applied, among the plurality of driving electrodes.
摘要翻译： 提供了一种触摸感测装置和触摸屏装置，该触摸感测装置包括驱动电路单元，该驱动电路单元向多个驱动电极顺序施加驱动信号，连接到多个感测电极并测量电容变化的感测电路单元 在由多个驱动电极和多个感测电极构成的节点电容器中，在多个驱动电极之间设置噪声去除单元，对未施加驱动信号的驱动电极提供预设的基准电压。
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公开(公告)号：US20200366191A1
公开(公告)日：2020-11-19
申请号：US16536601
申请日：2019-08-09
发明人： Byeong Hak JO , Hyun PAEK , Jeong Hoon KIM , Sol A KIM , Jong Mo LIM
IPC分类号： H02M3/07
摘要： A negative voltage generation circuit includes a clock generation circuit configured to generate a first clock signal, a first voltage control circuit configured to vary a first resistance value based on a magnitude of a power supply voltage and further configured to control a magnitude of a voltage in a first charge node, based on the varied first resistance value, and a first charge pump circuit configured to charge a voltage, controlled by the first voltage control circuit, in a charge mode, based on the first clock signal, and further configured to output a first voltage, generated by the charging, as a first negative voltage.
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公开(公告)号：US20200059202A1
公开(公告)日：2020-02-20
申请号：US16239735
申请日：2019-01-04
发明人： Byeong Hak JO , Jong Ok HA , Young Wong JANG , Jeong Hoon KIM
摘要： A bias circuit includes a current source to generate a reference current, a temperature compensation portion in an off-state in an initial start period in response to a first control signal, and in an on-state in a normal driving period, subsequent to the initial start period, and to receive a first current of the reference current, and a bias output portion to generate a warm up current based on the reference current in the initial start period and to generate a bias current based on a second current, which is lower than the reference current by an amount of the first current, in the normal driving period.
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公开(公告)号：US20190267992A1
公开(公告)日：2019-08-29
申请号：US16242518
申请日：2019-01-08
发明人： Byeong Hak JO , Jeong Hoon KIM , Hyun PAEK
IPC分类号： H03K17/693 , H03K17/0812 , H03K17/687
摘要： An apparatus for determining an optimum stacking number of an RF switch, in which a gate-off voltage and a body-off voltage are used to control transistors stacked in series to enter an OFF state. The apparatus includes a memory configured to store a peak voltage of a high-frequency signal in a corresponding band, and a gate limiting voltage, a drain-source limiting voltage, and a body limiting voltage in a corresponding process for each of the transistors, and a processor configured to calculate a gate terminal voltage, a drain-source voltage, and a body terminal voltage using the peak voltage, the gate limiting voltage, the drain-source limiting voltage, and the body limiting voltage and to determine an optimum stacking number based on the gate terminal voltage, the gate limiting voltage, the drain-source voltage, the drain-source limiting voltage, the body terminal voltage, and the body limiting voltage.
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公开(公告)号：US20190068122A1
公开(公告)日：2019-02-28
申请号：US15984664
申请日：2018-05-21
发明人： Jong Ok HA , Byeong Hak JO , Jeong Hoon KIM
摘要： An envelope tracking (ET) bias circuit includes an envelope tracking (ET) bias circuit includes an envelope detection circuit, an envelope amplifier circuit, and an envelope output circuit. The envelope detection circuit is configured to detect an envelope of an input signal, and output an envelope signal based on the detected envelope of the input signal. The envelope amplifier circuit is configured to differentially amplify the envelope signal in response to a first control signal and cancel a direct current (DC) offset of the envelope signal to output an amplified signal from which the DC offset is canceled. The envelope output circuit is configured to generate an ET bias current by selecting either one of a negative signal of the amplified signal and a positive signal of the amplified signal in response to a second control signal.
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公开(公告)号：US20190044509A1
公开(公告)日：2019-02-07
申请号：US15877774
申请日：2018-01-23
发明人： Jeong Hoon KIM , Hyun PAEK , Byeong Hak JO
摘要： A radio frequency (RF) switch apparatus includes a first series switch circuit including a first series switch disposed between a first terminal and a second terminal and operating in response to a first gate signal, and a first capacitor circuit and a second capacitor circuit connected across the first series switch; a first shunt-bias circuit disposed between a first connection node between the first terminal and the first series switch, and a ground, and providing a power voltage or a ground potential to the first connection node in response to a second gate signal; and a first shunt-impedance circuit connected between the first connection node and the first shunt-bias circuit and adjusting path impedance in response to a third gate signal. Each of the first capacitor circuit and the second capacitor circuit passes an alternating current (AC) signal or blocks a direct current (DC) voltage.
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公开(公告)号：US20180342984A1
公开(公告)日：2018-11-29
申请号：US15810764
申请日：2017-11-13
发明人： Byeong Hak JO , Jeong Hoon KIM , Jong Ok HA
CPC分类号： H03F1/02 , H03F3/189 , H03F3/21 , H03F3/24 , H03F3/45475 , H03F2200/102 , H03F2200/241 , H03F2200/375 , H03F2200/451 , H03F2203/45102
摘要： An envelope-tracking current bias circuit includes a first rectifying circuit, a second rectifying circuit, and a first arithmetic circuit. The first rectifying circuit is configured to detect an envelope of an input signal, and provide an envelope detection signal comprising a first direct current (DC) offset voltage. The second rectifying circuit is configured to provide a second DC offset voltage corresponding to the first DC offset voltage. The first arithmetic circuit is configured to provide an envelope signal in which the first DC offset voltage is reduced through subtraction between the envelope detection signal and the second DC offset voltage.
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