Vertical memory devices with conductive pads supported by dummy channels with varying dimensions

    公开(公告)号:US10559585B2

    公开(公告)日:2020-02-11

    申请号:US15871478

    申请日:2018-01-15

    摘要: A vertical memory device includes a conductive pattern structure on a first region of a substrate, the conductive pattern structure including a stack of interleaved conductive patterns and insulation layers. A pad structure is disposed on a second region of the substrate adjacent the first region of the substrate wherein edges of the conductive patterns are disposed at spaced apart points along a first direction to provide conductive pads arranged as respective steps in a staircase arrangement. A plurality of channel structures extends through the conductive pattern structure and a plurality of dummy channel structures extends through the pad structure. Respective contact plugs are disposed on the conductive pads. Numbers of the dummy channel structures per unit area passing through the conductive pads vary. Widths of the dummy channel structures passing through the conductive pads may also vary.

    Electronic device and method for controlling same

    公开(公告)号:US10521372B2

    公开(公告)日:2019-12-31

    申请号:US16095404

    申请日:2017-02-14

    摘要: Electronic devices according to various embodiments of the present invention comprise: a connector for communicating serial data to an external electronic device; a nonvolatile memory; and a processor, wherein the processor is configured to: acquire identification information of the external electronic device via the connector; confirm whether or not a designated mode of the external electronic device is supported at least on the basis of the identification information; based on the identification that the external electronic device supports the designated mode, acquire first additional information associated with the external electronic device; based on the identification that the external electronic device does not support the designated mode, acquire second additional information associated with the external electronic device; and store the identification information or at least a part of the second additional information in the nonvolatile memory.

    Three-dimensional (3D) semiconductor memory devices

    公开(公告)号:US10229914B2

    公开(公告)日:2019-03-12

    申请号:US15964190

    申请日:2018-04-27

    摘要: A three-dimensional (3D) semiconductor memory device may include a substrate including a cell array region and a connection region, an electrode structure including pluralities of first and second electrodes that are vertically and alternately stacked on a surface of the substrate, extending in a first direction that is parallel to the surface of the substrate, and may include a stair step structure on the connection region, first and second string selection electrodes that extend in the first direction on the electrode structure and spaced apart from each other in a second direction that is parallel to the surface of the substrate and perpendicular to the first direction. The first and second string selection electrodes may each include an electrode portion on the cell array region and a pad portion that extends from the electrode portion in the first direction and on the connection region. Widths in the second direction of the pad portions may be different from widths in the second direction of the respective electrode portions.

    Electronic device and method for controlling same

    公开(公告)号:US10922251B2

    公开(公告)日:2021-02-16

    申请号:US16729711

    申请日:2019-12-30

    摘要: Electronic devices according to various embodiments of the present invention comprise: a connector for communicating serial data to an external electronic device; a nonvolatile memory; and a processor, wherein the processor is configured to: acquire identification information of the external electronic device via the connector; confirm whether or not a designated mode of the external electronic device is supported at least on the basis of the identification information; based on the identification that the external electronic device supports the designated mode, acquire first additional information associated with the external electronic device; based on the identification that the external electronic device does not support the designated mode, acquire second additional information associated with the external electronic device; and store the identification information or at least a part of the second additional information in the nonvolatile memory.

    Apparatus and method of recognizing external device in a communication system
    6.
    发明授权
    Apparatus and method of recognizing external device in a communication system 有权
    在通信系统中识别外部设备的装置和方法

    公开(公告)号:US09223732B2

    公开(公告)日:2015-12-29

    申请号:US14254425

    申请日:2014-04-16

    IPC分类号: G06F3/00 G06Q30/00 G06F13/38

    摘要: An apparatus and a method of recognizing an external device in a portable terminal are provided. The apparatus includes a connector connected to the external device, and a controller configured to transmit a connection message, if the portable terminal is connected to the external device through the connector, the connection message asking whether the external device supports a second connection scheme to the external device by using a first connection scheme, configured to receive a connection response message as a response to the connection message from the external device, configured to determine based on the connection response message whether the external device supports the second connection scheme, and configured to recognize at least one device supporting the second connection scheme in the external device by activating the second connection scheme, if the external device supports the second connection scheme.

    摘要翻译: 提供了一种在便携式终端中识别外部设备的装置和方法。 该装置包括连接到外部设备的连接器,以及控制器,被配置为发送连接消息,如果便携式终端通过连接器连接到外部设备,该连接消息询问外部设备是否支持第二连接方案 外部设备,通过使用第一连接方案,被配置为从外部设备接收作为对所述连接消息的响应的连接响应消息,被配置为基于所述连接响应消息来确定所述外部设备是否支持所述第二连接方案,并且被配置为 如果外部设备支持第二连接方案,则通过激活第二连接方案来识别支持外部设备中的第二连接方案的至少一个设备。

    Nonvolatile memory devices having a three dimensional structure utilizing strapping of a common source region and/or a well region
    7.
    发明授权
    Nonvolatile memory devices having a three dimensional structure utilizing strapping of a common source region and/or a well region 有权
    具有利用公共源区和/或阱区的绑带的三维结构的非易失性存储器件

    公开(公告)号:US09219072B2

    公开(公告)日:2015-12-22

    申请号:US14548557

    申请日:2014-11-20

    IPC分类号: H01L27/115 H01L23/522

    摘要: Provided is a nonvolatile memory device having a three dimensional structure. The nonvolatile memory device may include cell arrays having a plurality of conductive patterns having a line shape three dimensionally arranged on a semiconductor substrate, the cell arrays being separated from one another; semiconductor patterns extending from the semiconductor substrate to cross sidewalls of the conductive patterns; common source regions provided in the semiconductor substrate under a lower portion of the semiconductor patterns in a direction in which the conductive patterns extend; a first impurity region provided in the semiconductor substrate so that the first impurity region extends in a direction crossing the conductive patterns to electrically connect the common source regions; and a first contact hole exposing a portion of the first impurity region between the separated cell arrays.

    摘要翻译: 具有三维结构的非易失性存储装置。 非易失性存储器件可以包括具有三维布置在半导体衬底上的线形状的多个导电图案的单元阵列,单元阵列彼此分离; 从半导体衬底延伸到导电图案的横截面的半导体图案; 在所述半导体图案的下部设置在所述半导体衬底中的在所述导电图案延伸的方向上的公共源极区; 设置在所述半导体衬底中的第一杂质区域,使得所述第一杂质区域沿与所述导电图案交叉的方向延伸,以电连接所述公共源极区域; 以及在分离的电池阵列之间暴露第一杂质区域的一部分的第一接触孔。

    SEMICONDUCTOR DEVICE INCLUDING RESISTOR STRUCTURE

    公开(公告)号:US20200051912A1

    公开(公告)日:2020-02-13

    申请号:US16277597

    申请日:2019-02-15

    摘要: A semiconductor device includes a substrate including a resistor region, a plurality of lower patterns in the resistor region, and a resistor line pattern on the plurality of lower patterns and the substrate of the resistor region. The plurality of lower patterns extend in a first direction parallel to a surface of the substrate and are spaced apart from each other in a second direction perpendicular to the first direction and parallel to the surface of the substrate. The resistor line pattern extends in the second direction. The resistor line pattern on the lower patterns has an upper surface and a lower surface protruding in a third direction perpendicular to the surface of the substrate.