公开(公告)号：US12061796B2

公开(公告)日：2024-08-13

申请号：US17808773

申请日：2022-06-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Gyeongmin Nam ,  Chanha Kim ,  Seungryong Jang

IPC: G06F3/06 ,  G11C11/56 ,  G11C16/04

CPC classification number: G06F3/0616 ,  G06F3/0635 ,  G06F3/0644 ,  G06F3/0679 ,  G11C11/56 ,  G11C16/0483

Abstract: A storage device includes a memory device including a first memory region, a second memory region, and a third memory region, the first memory region having a lowest bit-density relative to the second memory region and the third memory region, a second memory region having a medium bit-density relative to the first memory region and the third memory region, and a third memory region having a highest bit-density relative to the first memory region and the second memory region; and a controller configured to control the memory device The controller is configured to distribute data received from a host to the first to third memory regions based on attributes of the data, to determine a current state based on a data distribution amount for each of the first to third memory regions and a respective size of each of the first to third memory regions, and to perform an action of increasing or decreasing a size of the second memory region under the current state based on a reinforcement learning result for mitigating a reduction in lifespan of the third memory region.

公开(公告)号：US20240184483A1

公开(公告)日：2024-06-06

申请号：US18388684

申请日：2023-11-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chanha Kim ,  Namwook Kang ,  Youngjo Park ,  Kwangmin Han

IPC: G06F3/06

CPC classification number: G06F3/0656 ,  G06F3/0604 ,  G06F3/0644 ,  G06F3/0679

Abstract: A storage device includes a journal buffer configured to store a plurality of pieces of journal data, the journal buffer including a plurality of bank pools and a journal data region, where each of the plurality of pieces of journal data includes a first data item corresponding to a bank address and a second data item corresponding to a row address and a memory controller configured to control the journal buffer to temporarily store first pieces of journal data from among the plurality of pieces of journal data of which the first data items are equal to each other in at least one of the plurality of bank pools and rearrange the first pieces of journal data based on results of a comparison between the second data items corresponding to the first pieces of journal data.

公开(公告)号：US20230036616A1

公开(公告)日：2023-02-02

申请号：US17682084

申请日：2022-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha Kim ,  Gyeongmin Nam ,  Seungryong Jang

IPC: G06F3/06

Abstract: Storage devices and an operating method of a storage controller configured to control storage devices. For example, the storage device may include a non-volatile memory and a storage controller. The non-volatile memory includes a first block and a second block, the first block including first memory cells each storing N-bit data, and the second block including second memory cells each storing M-bit data. During a read reclaim operation on the first block, the storage controller determines read hot data stored in the first block and writes the read hot data to the second block. The storage controller may select a first word line corresponding to a first page in which a number of error bits is equal to or greater than a threshold value and determine data stored in a page corresponding to a second word line adjacent to the first word line as the read hot data.

公开(公告)号：US20210057025A1

公开(公告)日：2021-02-25

申请号：US16838078

申请日：2020-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjung Lee ,  Chanha Kim ,  Kangho Roh ,  Heewon Lee

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/26 ,  G11C16/10

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

公开(公告)号：US12045476B2

公开(公告)日：2024-07-23

申请号：US17586896

申请日：2022-01-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha Kim ,  Gyeongmin Nam ,  Seungryong Jang

IPC: G06F3/06

CPC classification number: G06F3/0631 ,  G06F3/0611 ,  G06F3/064 ,  G06F3/0659 ,  G06F3/0679

Abstract: Provided are a storage device, a storage controller, and an operating method of the storage controller. The storage device according to the inventive concept includes a non-volatile memory and a storage controller. The non-volatile memory includes a plurality of memory blocks, each memory block includes physical units having different retention strengths due to process variations, and the retention strengths respectively correspond to times that physical units retain data before respective reclaim operations for the physical units. The storage controller receives a write request and data from a host, selects a first physical unit based on hotness of data and retention strengths, and controls the non-volatile memory to write data to the first physical unit.

公开(公告)号：US12001349B2

公开(公告)日：2024-06-04

申请号：US17853227

申请日：2022-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha Kim ,  Gyeongmin Nam ,  Seungryong Jang

IPC: G06F12/14 ,  G06F12/0882 ,  G06F12/123

CPC classification number: G06F12/145 ,  G06F12/0882 ,  G06F12/123

Abstract: A storage device includes a memory device including a first memory region having a lowest bit density, a second memory region having a medium bit density, and a third memory region having a highest bit density, and a controller configured to control the memory device. The controller is configured to determine data from a host as being any one of hot data, warm data and cold data, is configured to store the hot data in the first memory region, is configured to store the warm data in the second memory region, is configured to store the cold data in the third memory region, is configured to select a source block of first memory blocks included in the first memory region, is configured to select destination blocks in each of the second and third memory regions, and is configured to migrate each piece of unit data stored in the source block to one of the destination blocks according to a degree of hotness of each piece of the unit data.

公开(公告)号：US11715516B2

公开(公告)日：2023-08-01

申请号：US17391209

申请日：2021-08-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjung Lee ,  Chanha Kim ,  Kangho Roh ,  Heewon Lee

IPC: G11C7/00 ,  G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

CPC classification number: G11C11/5671 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/26 ,  G11C2216/14

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

公开(公告)号：US11081171B2

公开(公告)日：2021-08-03

申请号：US16838078

申请日：2020-04-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yunjung Lee ,  Chanha Kim ,  Kangho Roh ,  Heewon Lee

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/10 ,  G11C16/26

Abstract: A nonvolatile memory device including: a memory cell array, the memory cell array including a plurality of cell strings, at least one of the cell strings including a plurality of memory cells stacked in a direction perpendicular to a surface of a substrate, at least one of the memory cells is a multi-level cell storing at least three bits; and a control logic circuit configured to control a page buffer to read a fast read page of the memory cells with one read voltage and at least two normal read pages of the memory cells with the same number of read voltages.

公开(公告)号：US12013778B2

公开(公告)日：2024-06-18

申请号：US17837163

申请日：2022-06-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyeongmin Nam ,  Chanha Kim ,  Seungryong Jang

IPC: G06F12/02 ,  G06F12/109 ,  G06F12/123

CPC classification number: G06F12/0246 ,  G06F12/109 ,  G06F12/123

Abstract: A storage device including: a memory device including memory blocks having different bit densities; and a controller, the controller including: a memory to store a logical address list including a number of recently received logical addresses and a hotness table including a hotness of each of the logical addresses in the list; and a processor to receive a write command, a latest logical address and data, to update a hotness of the latest logical address in the hotness table, to insert the latest logical address into the logical address list, and to control the memory device to program the data into one of the memory blocks depending on whether the hotness of the latest logical address exceeds a threshold value, the hotness of the latest logical address being updated based on how long ago a logical address the same as the latest logical address was received.

公开(公告)号：US12001709B2

公开(公告)日：2024-06-04

申请号：US17682084

申请日：2022-02-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Chanha Kim ,  Gyeongmin Nam ,  Seungryong Jang

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Storage devices and an operating method of a storage controller configured to control storage devices. For example, the storage device may include a non-volatile memory and a storage controller. The non-volatile memory includes a first block and a second block, the first block including first memory cells each storing N-bit data, and the second block including second memory cells each storing M-bit data. During a read reclaim operation on the first block, the storage controller determines read hot data stored in the first block and writes the read hot data to the second block. The storage controller may select a first word line corresponding to a first page in which a number of error bits is equal to or greater than a threshold value and determine data stored in a page corresponding to a second word line adjacent to the first word line as the read hot data.