Abstract:
A semiconductor device package may include: a semiconductor chip element; and a supporting structure on which the semiconductor chip element is mounted and including an electrical connection element for connecting the semiconductor chip element to an external terminal. The supporting structure may include: a first lead frame including a heat dissipation element; a second lead frame coupled to the first lead frame; and/or an insulator configured to electrically insulate the first and second lead frames from each other. Each of the first and second lead frames may include a mounting region on which the semiconductor chip element is mounted. The first lead frame may include: a first portion; and/or a second portion formed on the first portion and having a smaller width than that of the first portion. The insulator may be on the first portion around the second portion. The second lead frame may be on the insulator.
Abstract:
According to example embodiments, a substrate for a power module includes a first part, a second part, and a third part on a same surface of an underlying part of the substrate. The first part, the second part, and the third part may be spaced apart from each other, electrically insulated from each other, and not directly contacting each other. The third part may surround the first part and the second part. A first element module may be on the third part. The first part, the second part, and the third part may be conductive.
Abstract:
A semiconductor device and a method of manufacturing the semiconductor device are provided. The semiconductor device is a half bridged field effect transistor having a monolithic chip, and includes a semiconductor substrate with a 2-dimensional electron gas layer formed therein; a drain electrode formed on the semiconductor substrate; a first gate electrode, an output electrode, a second gate electrode, and a source electrode. The method of manufacturing the semiconductor device uses a method of monolithically forming a stack structure, which implements a half bridge function, on a substrate according to semiconductor processes.