公开(公告)号：US20240421190A1

公开(公告)日：2024-12-19

申请号：US18624253

申请日：2024-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Heum Choi ,  Gi Woong Shim ,  Rak Hwan Kim ,  Do Sun Lee ,  Hyo Seok Choi

IPC: H01L29/06 ,  H01L23/532 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least a first side of the gate electrode on the active pattern, and a source/drain contact connected to the source/drain region on the first side of the gate electrode. The source/drain contact may include first, second, and third layers which are sequentially stacked, the first to third layers including the same metal, with each layer having a respective crystal orientation. The source/drain contact may include a first grain boundary at an interface between the first layer and the second layer, and a second grain boundary at an interface between the second layer and the third layer.

公开(公告)号：US11881519B2

公开(公告)日：2024-01-23

申请号：US17826380

申请日：2022-05-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Gyu Cho ,  Rak Hwan Kim ,  Hyeok-Jun Son ,  Do Sun Lee ,  Won Keun Chung

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L21/28 ,  H01L21/311 ,  H01L29/786

CPC classification number: H01L29/4983 ,  H01L21/28132 ,  H01L21/31111 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/4908 ,  H01L29/6653 ,  H01L29/66553 ,  H01L29/66742 ,  H01L29/78696

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

公开(公告)号：US12165916B2

公开(公告)日：2024-12-10

申请号：US17838740

申请日：2022-06-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Keun Chung ,  Joon Gon Lee ,  Rak Hwan Kim ,  Chung Hwan Shin ,  Do Sun Lee ,  Nam Gyu Cho

IPC: H01L21/768

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

公开(公告)号：US11349007B2

公开(公告)日：2022-05-31

申请号：US17015296

申请日：2020-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Nam Gyu Cho ,  Rak Hwan Kim ,  Hyeok-Jun Son ,  Do Sun Lee ,  Won Keun Chung

IPC: H01L29/49 ,  H01L29/06 ,  H01L29/423 ,  H01L29/786 ,  H01L21/28 ,  H01L21/311 ,  H01L29/66

Abstract: A semiconductor device and a method of fabricating a semiconductor device, the device including a fin-type pattern extending in a first direction; a gate electrode extending in a second direction over the fin-type pattern, the second direction being different from the first direction; spacers on sidewalls of the gate electrode; a capping structure on the gate electrode and the spacers, the capping structure including a first capping pattern and a second capping pattern, the second capping pattern being on the first capping pattern; and an interlayer insulating film surrounding sidewalls of each of the spacers and sidewalls of the capping structure, the interlayer insulating film being in contact with the first capping pattern.

公开(公告)号：US11367651B2

公开(公告)日：2022-06-21

申请号：US16902923

申请日：2020-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Keun Chung ,  Joon Gon Lee ,  Rak Hwan Kim ,  Chung Hwan Shin ,  Do Sun Lee ,  Nam Gyu Cho

IPC: H01L21/768

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

公开(公告)号：US20210020500A1

公开(公告)日：2021-01-21

申请号：US16902923

申请日：2020-06-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Keun Chung ,  Joon Gon Lee ,  Rak Hwan Kim ,  Chung Hwan Shin ,  Do Sun Lee ,  Nam Gyu Cho

IPC: H01L21/768

Abstract: A semiconductor device includes a first interlayer insulating film; a conductive connection structure provided in the first interlayer insulating film; a second interlayer insulating film provided on the first interlayer insulating film; a wiring structure provided in the second interlayer insulating film and connected to the conductive connection structure; and an insertion liner interposed between an upper surface of the conductive connection structure and the wiring structure, the insertion liner including carbon.

公开(公告)号：US10128245B2

公开(公告)日：2018-11-13

申请号：US15473031

申请日：2017-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Do Sun Lee ,  Joon Gon Lee ,  Na Rae Kim ,  Chul Sung Kim ,  Do Hyun Lee ,  Ryuji Tomita ,  Sang Jin Hyun

IPC: H01L29/78 ,  H01L27/092 ,  H01L29/165 ,  H01L29/45 ,  H01L29/417 ,  H01L21/8238 ,  H01L29/08 ,  H01L29/66 ,  H01L21/02 ,  H01L21/285

Abstract: Semiconductor devices may have a first semiconductor element including first active regions that are doped with a first conductivity-type impurity and that are on a semiconductor substrate, a first gate structure between the first active regions, and first contacts connected to the first active regions, respectively; and a second semiconductor element including second active regions that are doped with a second conductivity-type impurity different from the first conductivity-type impurity and that are on the semiconductor substrate, a second gate structure between the second active regions, and second contacts connected to the second active regions, respectively, and having a second length greater than a first length of each of the first contacts in a first direction parallel to an upper surface of the semiconductor substrate.