公开(公告)号：US09256949B2

公开(公告)日：2016-02-09

申请号：US13919384

申请日：2013-06-17

Applicant: SAMSUNG ELECTRONICS CO., LTD. ,  SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION

Inventor： Sang-Heon Lee ,  Soo-Jung Ryu ,  Yeon-Gon Cho ,  Do-Hyun Kim ,  Yeong-Gil Shin ,  Byeong-Hun Lee

IPC: G06T7/00

CPC classification number: G06T7/0081 ,  G06T7/11 ,  G06T2207/10081

Abstract: A region growing apparatus using multi-core includes a plurality of cores, each core including an operation controller configured to perform an operation for region growing of a 2D pixel region or 3D pixel region and an inner memory configured to store a queue associated with a seed pixel as a target of the operation; and a shared memory connected to the plurality of cores over a network and shared by the plurality of cores.

Abstract translation: 使用多核的区域生长装置包括多个核心，每个核心包括被配置为执行2D像素区域或3D像素区域的区域生长的操作的操作控制器和被配置为存储与种子相关联的队列的内部存储器 像素作为操作的目标; 以及通过网络连接到所述多个核并由所述多个核共享的共享存储器。

公开(公告)号：US12237304B2

公开(公告)日：2025-02-25

申请号：US17665810

申请日：2022-02-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minkyeong Park ,  Do-Hyun Kim ,  Jaekyu Sung

IPC: H01L25/065 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor package including a package substrate including first and second bonding pads, third bonding pads spaced apart from the first bonding pads, and fourth bonding pads spaced apart from the second bonding pads; a first chip stack including first chips stacked on the package substrate, each first chip including first signal pads and first power/ground pads alternately arranged; a second chip stack including second chips stacked on the first chip stack, each second chip including second signal pads and second power/ground pads alternately arranged; first lower wires that connect the first signal pads to the first bonding pads; second lower wires that connect the first power/ground pads to the second bonding pads; first upper wires that connect the second signal pads of the second chips to the third bonding pads; and second upper wires that connect the second power/ground pads of the second chips to the fourth bonding pads.

公开(公告)号：US09323124B2

公开(公告)日：2016-04-26

申请号：US14082584

申请日：2013-11-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-hoon Lee ,  Do-Hyun Kim ,  Sang-wook Kim ,  Chang-jung Kim

IPC: G09G3/36 ,  G02F1/1368

CPC classification number: G02F1/1368 ,  G09G3/3648 ,  G09G2330/027

Abstract: Provided are display apparatuses and methods of operating the same. In a display apparatus, a display image may be continuously held for longer than about 10 msec after the power of the display panel is turned off. The display apparatus may indicate a liquid crystal display (LCD) apparatus including an oxide thin film transistor (TFT). Off leakage current of the oxide TFT may be less than about 10−14 A.

Abstract translation: 提供了显示装置及其操作方法。 在显示装置中，在显示面板的电源关闭之后，显示图像可以连续保持超过约10毫秒。 显示装置可以指示包括氧化物薄膜晶体管（TFT）的液晶显示器（LCD）装置。 氧化物TFT的漏电流可以小于约10-14A。

公开(公告)号：US10861826B2

公开(公告)日：2020-12-08

申请号：US16385363

申请日：2019-04-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Suk Oh ,  Do-Hyun Kim ,  Sunwon Kang

IPC: H01L23/48 ,  H01L29/40 ,  H01L25/065 ,  H01L25/00

Abstract: A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.

公开(公告)号：US11508687B2

公开(公告)日：2022-11-22

申请号：US16950211

申请日：2020-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Minkyeong Park ,  Do-Hyun Kim

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L23/538 ,  H01L21/56

Abstract: A semiconductor package may include a substrate including a first coupling terminal and a second coupling terminal, a first chip disposed on the substrate, the first chip including a first pad and a second pad, and a connection structure connecting the first coupling terminal to the first pad. A portion of the connection structure may be in contact with a first side surface of the first chip. The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal.

公开(公告)号：US11257723B2

公开(公告)日：2022-02-22

申请号：US16698160

申请日：2019-11-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Do-Hyun Kim ,  Sunwon Kang ,  Hogeon Song ,  Kyung Suk Oh

IPC: H01L23/544 ,  H01L21/18 ,  H01L21/304 ,  H01L21/66 ,  H01L21/67

Abstract: An inspection system for a semiconductor package includes an inspection apparatus that includes a stage on which the semiconductor package is loaded, and a computer coupled to the inspection apparatus. The semiconductor package may include a first semiconductor chip and a second semiconductor chip on the first semiconductor chip, the computer may provide first identification information about the first semiconductor chip and second identification information about the second semiconductor chip, and the computer may control the inspection apparatus to selectively perform a package test process on one of the first and second semiconductor chips, the one of the first and second semiconductor chips being identified as a good chip based on the first identification information and the second identification information.

公开(公告)号：US20210249377A1

公开(公告)日：2021-08-12

申请号：US16950211

申请日：2020-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： MINKYEONG PARK ,  Do-Hyun Kim

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L23/538

Abstract: A semiconductor package may include a substrate including a first coupling terminal and a second coupling terminal, a first chip disposed on the substrate, the first chip including a first pad and a second pad, and a connection structure connecting the first coupling terminal to the first pad. A portion of the connection structure may be in contact with a first side surface of the first chip. The connection structure may include a connection conductor electrically connecting the first pad to the first coupling terminal.

公开(公告)号：US11664348B2

公开(公告)日：2023-05-30

申请号：US17094267

申请日：2020-11-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyung Suk Oh ,  Do-Hyun Kim ,  Sunwon Kang

IPC: H01L23/48 ,  H01L23/52 ,  H01L25/065 ,  H01L25/00

CPC classification number: H01L25/0657 ,  H01L25/50 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06562 ,  H01L2225/06586

Abstract: A semiconductor package includes a substrate, a first semiconductor chip on the substrate, a second semiconductor chip on the first semiconductor chip and a connection structure. The second semiconductor chip includes a first segment that protrudes outwardly beyond one side of the first semiconductor chip and a second connection pad on a bottom surface of the first segment of the second semiconductor chip. The connection structure includes a first structure between the substrate and the first segment of the second semiconductor chip and a first columnar conductor penetrating the first structure to be in contact with the substrate and being disposed between the second connection pad and the substrate, thereby electrically connecting the second semiconductor chip to the substrate.