公开(公告)号：US20180211709A1

公开(公告)日：2018-07-26

申请号：US15839121

申请日：2017-12-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doo-hyun KIM

IPC: G11C16/14 ,  G11C16/04 ,  G11C16/34 ,  G11C16/24

CPC classification number: G11C16/14 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/32 ,  G11C16/3459

Abstract: Provided is a method of operating a nonvolatile memory device including a memory cell array connected to a plurality of lines. The method may include performing a first loop including a first recovery section having a first operation time period, on a first line of the plurality of lines by applying a first voltage for a time period, wherein the first voltage is discharged with a first slope, and performing a second loop after the first loop including a second recovery section having a second operation time period that is different from the first operation time period, on the first line by applying a second voltage for a time period, wherein the second voltage is discharged with a second slope less than the first slope.

公开(公告)号：US20170123680A1

公开(公告)日：2017-05-04

申请号：US15300516

申请日：2015-03-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doo-hyun KIM ,  Sang-jo LEE ,  Do-hyung KIM

IPC: G06F3/06

CPC classification number: G06F3/0608 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0673 ,  G06F13/1663 ,  G06F13/385

Abstract: Disclosed is a method of recording variable size data. A first processor receives, from a second processor, a read parameter including information on a read address value of data which has been read by the second processor and is stored in an external memory, compares the read address value acquired from the received read parameter and a record address value for data previously recorded in the external memory by the first processor, and determines whether or not the first processor is to transmit data to the second processor on the basis of the comparison result, thereby being capable of reducing the load consumed in controlling variable size data and efficiently utilizing a limited memory.

公开(公告)号：US20180124412A1

公开(公告)日：2018-05-03

申请号：US15716995

申请日：2017-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-kwon NA ,  Ki-won YOO ,  Doo-hyun KIM

IPC: H04N19/159 ,  H04N19/119 ,  H04N19/182 ,  H04N19/167

Abstract: A processing apparatus has a processor including a first memory. The processor divides a frame in video content into a plurality of coding units (CUs), and encodes the plurality of CUs in a diagonal direction to generate an encoded frame, wherein when a first CU is encoded based on a first encoding type, the processor is further configured to load, from a second memory, a first partial region of a reference frame corresponding to first position information of the first CU to the first memory and encode the first CU based on the first partial region of the reference frame loaded from the second memory, and wherein, when the first CU is encoded based on a second encoding type, the processor is further configured to encode the first CU based on a first reference pixel value corresponding to the first position information of the first CU from the first memory.

公开(公告)号：US20170329604A1

公开(公告)日：2017-11-16

申请号：US15535304

申请日：2015-10-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doo-hyun KIM ,  Jae-hyun KIM ,  Joon-ho SONG

IPC: G06F9/30 ,  G06F9/38

CPC classification number: G06F9/3009 ,  G06F9/3001 ,  G06F9/3017 ,  G06F9/3818 ,  G06F9/3895

Abstract: A processor includes: at least one operator; and at least one macro instruction processing unit configured to share the at least one operator, wherein the at least one macro instruction processing unit is configured to execute a macro instruction with respect to input data by using the at least one operator to output result data, and to control the at least one operator to perform an operation included in the macro instruction, and the at least one macro instruction processing unit comprises: a scheduler configured to manage schedules of the at least one operator and output input data and a control signal to the at least one operator; and a controller configured to control the scheduler to execute the macro instruction and to receive the result data from the scheduler.

公开(公告)号：US20180218775A1

公开(公告)日：2018-08-02

申请号：US15714155

申请日：2017-09-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doo-hyun KIM ,  Il-han PARK ,  Jong-hoon LEE

IPC: G11C16/14 ,  G11C16/04 ,  G11C16/34 ,  G11C16/16 ,  G11C11/56

CPC classification number: G11C16/14 ,  G11C11/5635 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/16 ,  G11C16/3427 ,  G11C16/3445 ,  G11C16/3459

Abstract: A soft erase method of a memory device including applying a program voltage to a first memory cell in at least one of program loops when a plurality of program loops are performed to program the first memory cell into a Nth programming state, wherein the first memory cell is included in a selected memory cell string connected to a selected first bit line and is connected to a selected word line; and soft erasing a second memory cell by applying, in a first verification interval, a read voltage for verifying a programming state of the first memory cell to the selected word line and applying a first pre-pulse to a gate of a string select transistor of each of a plurality of unselected memory cell strings connected to the first bin line and a plurality of unselected memory cell strings connected to an unselected second bit line.

公开(公告)号：US20180109702A1

公开(公告)日：2018-04-19

申请号：US15686598

申请日：2017-08-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sang-kwon NA ,  Doo-hyun KIM ,  Ki-won YOO

IPC: H04N1/64 ,  H04N19/36 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/19

CPC classification number: H04N1/646 ,  H04N1/6058 ,  H04N19/124 ,  H04N19/176 ,  H04N19/186 ,  H04N19/19 ,  H04N19/36 ,  H04N19/85

Abstract: An image processing apparatus is provided. The image processing apparatus includes a signal processor and a controller. The signal processor processes an image signal including a plurality of color components. The controller controls the signal processor to perform a color gamut conversion, a domain transform, a quantization processing and an encoding processing with respect to an input image signal, and in response to differences between the color components of the image signal being less than a first critical level, to not perform the color gamut conversion.

公开(公告)号：US20170026657A1

公开(公告)日：2017-01-26

申请号：US15301169

申请日：2015-03-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Doo-hyun KIM ,  Do-hyung KIM

IPC: H04N19/42 ,  H04N19/91 ,  H04N19/176 ,  H04N19/13 ,  H04N19/157

Abstract: Disclosed is a method of executing a decoding command. A method of executing a decoding command includes acquiring the decoding command, determining a type of an executable operation on the basis of the acquired decoding command, and performing any one of an operation of storing context information about an encoded symbol and an operation of decoding the encoded symbol on the basis of the determination result.

Abstract translation: 公开了执行解码命令的方法。 执行解码命令的方法包括获取解码命令，基于所获取的解码命令确定可执行操作的类型，以及执行存储关于编码符号的上下文信息的操作和解码的操作中的任一个 基于确定结果的编码符号。