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    FLASH MEMORY DEVICE HAVING MULTI-STACK STRUCTURE AND CHANNEL SEPARATION METHOD THEREOF
    1.
    发明公开
    FLASH MEMORY DEVICE HAVING MULTI-STACK STRUCTURE AND CHANNEL SEPARATION METHOD THEREOF 审中-公开

    公开(公告)号：US20230145117A1

    公开(公告)日：2023-05-11

    申请号：US17982081

    申请日：2022-11-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyebin KIM ,  Yohan Lee ,  Ho-Jun Lee

    IPC: G11C16/10 ,  G11C16/12 ,  G11C16/08

    CPC classification number: G11C16/102 ,  G11C16/12 ,  G11C16/08

    Abstract: A flash memory device is provided. The flash memory device includes: a first memory cell; a second memory cell on the first memory cell; and a third memory cell between the first memory cell and the second memory cell. The first memory cell, the second memory cell and the third memory cell share a channel. The third memory cell is configured to block channel sharing between the first memory cell and the second memory cell based on a channel separation voltage provided in first to k-th program loops. The third memory cell is configured to connect the channel sharing between the first memory cell and the second memory cell based on a channel connection voltage provided to the third memory cell in a (k+1)-th program loop.

    Electronic device for controlling an external device using a number and method thereof
    2.
    发明授权
    Electronic device for controlling an external device using a number and method thereof 有权

    公开(公告)号：US10548003B2

    公开(公告)日：2020-01-28

    申请号：US14598900

    申请日：2015-01-16

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ho-Jun Lee ,  Deok-Ho Kim ,  Min-Seok Kim ,  Yeul-Tak Sung ,  Jung-Kih Hong

    IPC: H04W12/00

    Abstract: An electronic device and method for controlling an external device using a number are provided. The electronic device includes a processor configured to transmit an input number to a server over a mobile network, in response to a connection being input, receive an identifier of the external device, which is issued by the server, send a connection request to the external device over the mobile network using the received identifier of the external device, and control the external device by sending a control command to the external device, in response to receiving an indication regarding completion of access authentication from the external device, and a communication interface configured to perform communication with the external device and the server.

    Flash memory device having multi-stack structure and channel separation method thereof
    4.
    发明授权
    Flash memory device having multi-stack structure and channel separation method thereof 有权

    公开(公告)号：US12119066B2

    公开(公告)日：2024-10-15

    申请号：US17982081

    申请日：2022-11-07

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyebin Kim ,  Yohan Lee ,  Ho-Jun Lee

    IPC: G11C16/10 ,  G11C16/08 ,  G11C16/12

    CPC classification number: G11C16/102 ,  G11C16/08 ,  G11C16/12

    Abstract: A flash memory device is provided. The flash memory device includes: a first memory cell; a second memory cell on the first memory cell; and a third memory cell between the first memory cell and the second memory cell. The first memory cell, the second memory cell and the third memory cell share a channel. The third memory cell is configured to block channel sharing between the first memory cell and the second memory cell based on a channel separation voltage provided in first to k-th program loops. The third memory cell is configured to connect the channel sharing between the first memory cell and the second memory cell based on a channel connection voltage provided to the third memory cell in a (k+1)-th program loop.

    METHOD AND APPARATUS FOR CONTROLLING TRANSMISSION AND RECEPTION OF DATA AMONG PLURALITY OF DEVICES IN COMMUNICATION SYSTEM
    5.
    发明申请
    METHOD AND APPARATUS FOR CONTROLLING TRANSMISSION AND RECEPTION OF DATA AMONG PLURALITY OF DEVICES IN COMMUNICATION SYSTEM 有权
    用于控制通信系统中多设备传输和接收数据的方法和装置

    公开(公告)号：US20150304424A1

    公开(公告)日：2015-10-22

    申请号：US14646361

    申请日：2013-11-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Ho-Jun Lee ,  Jung-Baek Ha

    IPC: H04L29/08 ,  H04L12/24

    CPC classification number: H04L67/125 ,  H04L41/0803 ,  H04W72/04 ,  H04W84/18

    Abstract: A method for controlling the transmission and reception of data among a plurality of devices in a communication system comprises the steps of: enabling a master device as one of the plurality of devices to determine a channel to be assigned to each slave device connected in series thereto; and transferring channel information of each determined slave device to the slave devices.

    Abstract translation: 一种用于控制通信系统中的多个设备之间的数据的发送和接收的方法包括以下步骤：使得主设备作为多个设备之一来确定要分配给每个从设备串行连接的从设备的信道 ; 并将每个确定的从设备的信道信息传送到从设备。

    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME
    8.
    发明申请
    NONVOLATILE MEMORY DEVICE AND MEMORY SYSTEM INCLUDING THE SAME 审中-公开

    公开(公告)号：US20180268921A1

    公开(公告)日：2018-09-20

    申请号：US15824068

    申请日：2017-11-28

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ho-Jun Lee ,  Bong-Soon Lim ,  Sang-Won Park

    IPC: G11C29/00 ,  G06F12/02

    CPC classification number: G11C29/765 ,  G06F12/0246 ,  G06F2212/7201 ,  G06F2212/7204 ,  G11C29/88 ,  G11C29/883

    Abstract: A nonvolatile memory device includes a memory cell array and a bad block remapping circuit. The memory cell array includes a first mat and a second mat that are paired with each other. The first mat includes a plurality of first memory blocks. The second mat includes a plurality of second memory blocks. A first selection memory block among the plurality of first memory blocks and a second selection memory block among the plurality of second memory blocks are accessed based on a first address. The bad block remapping circuit generates a first remapping address based on the first address when it is determined that the first selection memory block is defective. A first remapping memory block among the plurality of first memory blocks and the second selection memory block are accessed based on the first remapping address.

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