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公开(公告)号:US11101269B2
公开(公告)日:2021-08-24
申请号:US17025497
申请日:2020-09-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Min Yoo , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Joo Ho Jung , Eui Chui Hwang , Sung Moon Lee
IPC: H01L27/088 , H01L29/40 , H01L21/762 , H01L29/78
Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
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公开(公告)号:US11011519B2
公开(公告)日:2021-05-18
申请号:US16368990
申请日:2019-03-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eui Chul Hwang , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Sang Min Yoo , Joo Ho Jung , Sung Moon Lee
IPC: H01L27/092 , H01L27/02 , H01L29/423 , H01L29/08 , H01L21/8234 , H01L21/311 , H01L21/306 , H01L21/762 , H01L29/66
Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.
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公开(公告)号:US11380687B2
公开(公告)日:2022-07-05
申请号:US17126166
申请日:2020-12-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun Mo Park , Ju Youn Kim , Hyung Joo Na , Sang Min Yoo , Eui Chui Hwang
IPC: H01L21/00 , H01L27/092 , H01L29/06 , H01L21/8238 , H01L29/78 , H01L29/66
Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a substrate including first and second regions, first active fins extending in a first direction on the first region, second active fins extending parallel to the first active fins on the second region, and single diffusion break regions between two first active fins. Single diffusion break regions may be spaced apart from each other in the first direction. The semiconductor devices may also include a lower diffusion break region between two second active fins and extending in a second direction that is different from the first direction and upper diffusion break regions on the lower diffusion break region. The upper diffusion break regions may be spaced apart from each other in the first direction, and each of the upper diffusion break regions may overlap the lower diffusion break region.
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公开(公告)号:US12183734B2
公开(公告)日:2024-12-31
申请号:US18230052
申请日:2023-08-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Min Yoo , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Joo Ho Jung , Eui Chul Hwang , Sung Moon Lee
IPC: H01L27/088 , H01L21/762 , H01L29/40 , H01L29/78
Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
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5.
公开(公告)号:US11538807B2
公开(公告)日:2022-12-27
申请号:US17318133
申请日:2021-05-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eui Chul Hwang , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Sang Min Yoo , Joo Ho Jung , Sung Moon Lee
IPC: H01L27/092 , H01L27/02 , H01L29/423 , H01L29/08 , H01L21/8234 , H01L21/311 , H01L21/306 , H01L21/762 , H01L29/66
Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.
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6.
公开(公告)号:US20190393220A1
公开(公告)日:2019-12-26
申请号:US16204095
申请日:2018-11-29
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyung Joo Na , Ju Youn Kim , Bong Seok Suh , Sang Min Yoo , Joo Ho Jung , Eui Chul Hwang , Sung Moon Lee
IPC: H01L27/092 , H01L29/66 , H01L29/78 , H01L29/08 , H01L29/06 , H01L21/8238 , H01L21/033
Abstract: A FINFET includes a first fin extending in a first direction on a substrate and, a second fin extending in the first direction and spaced apart from the first fin in the first direction. A third fin is provided with a long side shorter than long sides of the first fin and the second fin and is disposed between the first fin and the second fin. A first gate structure extends in a second direction different from the first direction and crosses the first fin. A device isolation layer is disposed on a lower sidewall of each of the first, second and third fins and is formed to extend in the first direction. An electrically insulating diffusion break region includes a first portion crossing between the first fin and the third fin, a second portion crossing between the second fin and the third fin, and a third portion disposed between the first portion and the second portion on the third fin. The diffusion break region extends in the second direction on the device isolation layer. A level of a lower surface of the third portion is higher than a level of a lower end of each of the first portion and the second portion and is lower than a level of an upper surface of the first gate structure.
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公开(公告)号:US11784186B2
公开(公告)日:2023-10-10
申请号:US17393025
申请日:2021-08-03
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Min Yoo , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Joo Ho Jung , Eui Chui Hwang , Sung Moon Lee
IPC: H01L27/088 , H01L29/40 , H01L21/762 , H01L29/78
CPC classification number: H01L27/0886 , H01L21/76224 , H01L29/408 , H01L29/7846
Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
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公开(公告)号:US20210265351A1
公开(公告)日:2021-08-26
申请号:US17318133
申请日:2021-05-12
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Eui Chul Hwang , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Sang Min Yoo , Joo Ho Jung , Sung Moon Lee
IPC: H01L27/092 , H01L27/02 , H01L29/423 , H01L29/08 , H01L21/8234 , H01L21/311 , H01L21/306 , H01L21/762 , H01L29/66
Abstract: A semiconductor device and a method for fabricating the same, the device including an active pattern extending in a first direction on a substrate; a field insulating film surrounding a part of the active pattern; a first gate structure extending in a second direction on the active pattern and the field insulating film, a second gate structure spaced apart from the first gate structure and extending in the second direction on the active pattern and the field insulating film; and a first device isolation film between the first and second gate structure, wherein a side wall of the first gate structure facing the first device isolation film includes an inclined surface having an acute angle with respect to an upper surface of the active pattern, and a lowermost surface of the first device isolation film is lower than or substantially coplanar with an uppermost surface of the field insulating film.
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公开(公告)号:US10910376B2
公开(公告)日:2021-02-02
申请号:US16290222
申请日:2019-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Jun Mo Park , Ju Youn Kim , Hyung Joo Na , Sang Min Yoo , Eui Chul Hwang
IPC: H01L21/00 , H01L27/092 , H01L29/06 , H01L21/8238 , H01L29/78 , H01L29/66
Abstract: Semiconductor devices and methods of forming the same are provided. Semiconductor devices may include a substrate including first and second regions, first active fins extending in a first direction on the first region, second active fins extending parallel to the first active fins on the second region, and single diffusion break regions between two first active fins. Single diffusion break regions may be spaced apart from each other in the first direction. The semiconductor devices may also include a lower diffusion break region between two second active fins and extending in a second direction that is different from the first direction and upper diffusion break regions on the lower diffusion break region. The upper diffusion break regions may be spaced apart from each other in the first direction, and each of the upper diffusion break regions may overlap the lower diffusion break region.
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公开(公告)号:US10804265B2
公开(公告)日:2020-10-13
申请号:US16382382
申请日:2019-04-12
Applicant: Samsung Electronics Co., Ltd.
Inventor: Sang Min Yoo , Ju Youn Kim , Hyung Joo Na , Bong Seok Suh , Joo Ho Jung , Eui Chul Hwang , Sung Moon Lee
IPC: H01L27/088 , H01L29/40 , H01L21/762 , H01L29/78
Abstract: A semiconductor device includes a first active pattern extending lengthwise along a first direction and a second active pattern extending lengthwise along the first direction and spaced apart from the first active pattern in the first direction. The device also includes a field insulating film between the first active pattern and the second active pattern. An upper surface of the field insulating film is lower than or coplanar with upper surfaces of the first and second active patterns. The device further includes an element isolation structure in an isolation trench in the first active pattern and the field insulating film. An upper surface of the element isolation structure is higher than the upper surfaces of the first and second active patterns.
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