公开(公告)号：US20150185812A1

公开(公告)日：2015-07-02

申请号：US14560272

申请日：2014-12-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-Hun Hyun ,  Jeong-Kyoum Kim ,  In-Dal Song ,  In-Sung Joe ,  Jung-Hwan Choi ,  Hyun-II Byun ,  Yong-Won Jung

IPC: G06F1/32 ,  G11C11/4074 ,  G11C7/10

CPC classification number: G06F1/3275 ,  G06F1/3225 ,  G11C7/1054 ,  G11C7/1081 ,  Y02D10/14

Abstract: A memory system includes a memory controller and a memory device. The memory device includes a first converter and a first power controller. The memory device is connected to the memory controller through a channel including at least one optical signal line. The first converter converts between at least one optical signal of the at least one optical signal line and at least one internal electrical signal of the memory device. The first power controller controls power consumption of the first converter based on an operating state of the memory device.

Abstract translation: 存储器系统包括存储器控制器和存储器件。 存储器件包括第一转换器和第一功率控制器。 存储器件通过包括至少一个光信号线的通道连接到存储器控制器。 第一转换器在至少一个光信号线的至少一个光信号与存储器件的至少一个内部电信号之间进行转换。 第一功率控制器基于存储器件的操作状态来控制第一转换器的功耗。

公开(公告)号：US20140376859A1

公开(公告)日：2014-12-25

申请号：US14483583

申请日：2014-09-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： In-Sung Joe ,  Sung-dong Suh ,  Kyoung-won Na ,  Kyoung-ho Ha ,  Seong-gu Kim ,  Yong-hwack Shin

IPC: G02B6/124 ,  G02B6/122 ,  G02B6/12

CPC classification number: G02B6/124 ,  G02B6/12002 ,  G02B6/12004 ,  G02B6/122

Abstract: An integrated circuit device includes a plurality of device layers disposed on a substrate. A first one of the device layers includes at least one photo device and/or at least one electronic device and a second one of the device layers includes at least one photo device overlying the at least one photo device and/or the at least one electronic device of the first one of the device layers.

Abstract translation: 集成电路器件包括设置在衬底上的多个器件层。 设备层中的第一个包括至少一个照片设备和/或至少一个电子设备，并且设备层中的第二个设备层包括覆盖至少一个照片设备和/或至少一个电子设备的至少一个照片设备 第一个设备层的设备。

公开(公告)号：US08543892B2

公开(公告)日：2013-09-24

申请号：US13625554

申请日：2012-09-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwang Soo Seol ,  Sung-Il Park ,  Kyoung Lae Cho ,  In-Sung Joe

IPC: G11C21/00

CPC classification number: H03M13/611 ,  G06F11/1072 ,  G11C7/1006 ,  G11C11/5642 ,  G11C16/26 ,  G11C29/00 ,  H03M13/13 ,  H03M13/15 ,  H03M13/27 ,  H03M13/2732 ,  H03M13/2906 ,  H03M13/3707 ,  H03M13/3715 ,  H03M13/47

Abstract: Memory devices and/or methods of storing memory data bits are provided. A memory device includes a multi-level cell (MLC) array including a plurality of MLCs, an error correction unit configured to encode data to be recorded in an MLC, where the encoded data is converted to convert the encoded data into a codeword, an error pattern analysis unit configured to analyze a first data pattern included in the codeword corresponding to an error pattern included in the codeword and a data conversion unit configured to convert the analyzed first data pattern into a second data pattern. According to the above memory devices and/or methods, it is possible to efficiently reduce a data error that occurs when the data is stored for a relatively long period of time, thereby improving reliability.

Abstract translation: 提供了存储器件和/或存储存储器数据位的方法。 存储器件包括包括多个MLC的多电平单元（MLC）阵列，纠错单元，被配置为编码要记录在MLC中的数据，其中编码数据被转换以将编码数据转换为码字， 错误模式分析单元，被配置为分析与包括在码字中的错误模式相对应的码字中包含的第一数据模式;以及数据转换单元，被配置为将分析的第一数据模式转换为第二数据模式。 根据上述存储器件和/或方法，可以有效地减少在数据存储较长时间段时发生的数据错误，从而提高可靠性。