公开(公告)号：US11327395B2

公开(公告)日：2022-05-10

申请号：US16815219

申请日：2020-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-hee Kim ,  Chan Hwang

IPC: G03F1/26 ,  G03F1/36 ,  H01L21/283 ,  H01L21/311 ,  H01L29/41 ,  G03F1/32 ,  H01L27/108

Abstract: A method for fabricating a phase shift mask includes preparing a transmissive substrate on which a first mask region and a second mask region surrounding the first mask region are defined. In the first mask region, main patterns are formed having a first pitch in a first direction and a second direction perpendicular to the first direction. Each of the main patterns has a first area. In at least one row, assist patterns are formed at the first pitch to surround the main patterns. Each of the assist patterns has a second area less than the first area. In the second mask region, dummy patterns are formed in a plurality of rows. The dummy patterns surround the assist patterns at the first pitch. Each of the dummy patterns has a third area greater than the first area.

公开(公告)号：US20170077103A1

公开(公告)日：2017-03-16

申请号：US15202874

申请日：2016-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye-sung Park ,  ln-seak Hwang ,  Bo-un Yoon ,  Byoung-ho Kwon ,  Jong-hyuk Park ,  Jae-hee Kim ,  Myung-jae Jang

IPC: H01L27/108

CPC classification number: H01L27/10852 ,  H01L27/10814 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/90

Abstract: A method of manufacturing a semiconductor device includes: preparing a wafer in which a first cell area and a second cell area are defined; forming a bottom electrode structure in the first cell area and a dummy structure located in the second cell area; and sequentially forming a dielectric layer and a top electrode on the bottom electrode structure and the dummy structure, wherein the bottom electrode structure includes a plurality of bottom electrodes extending in a first direction in the first cell area and first and second supporters to support the plurality of bottom electrodes, wherein the dummy structure includes a first mold film, a first supporter film, a second mold film, and a second supporter film that are sequentially formed to cover the second cell area, and the second supporter and the second supporter film are at a same level relative to the wafer.

Abstract translation: 制造半导体器件的方法包括：制备其中限定了第一单元区域和第二单元区域的晶片; 在所述第一单元区域中形成底部电极结构，以及位于所述第二单元区域中的虚设结构; 并且在所述底部电极结构和所述虚拟结构上顺序地形成电介质层和顶部电极，其中所述底部电极结构包括在所述第一电池区域中沿第一方向延伸的多个底部电极以及支撑所述多个电极的所述第一和第二支撑件 的底部电极，其中所述虚拟结构包括依次形成以覆盖所述第二电池区域的第一模制膜，第一支撑膜，第二模制膜和第二支撑膜，并且所述第二支撑件和所述第二支撑膜为 在相同的水平相对于晶片。

公开(公告)号：US11474426B2

公开(公告)日：2022-10-18

申请号：US16564779

申请日：2019-09-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Soon Mok Ha ,  Jae-hee Kim ,  Yong-wook Lee ,  Yong-woo Kim

IPC: G03F1/42 ,  G03F1/38 ,  H01L21/027 ,  G03F7/038

Abstract: A photomask for negative-tone development (NTD) includes a main region, and a scribe lane region surrounding the main region and including a first lane and a second lane. The first and the second lane is provided at first opposite sides of each other with respect to the main region. The first lane includes a first sub-lane extending in a first direction and a second sub-lane that extending in the first direction. The first sub-lane includes a first dummy pattern and the second sub-lane includes a second dummy pattern. The first dummy pattern and the second dummy pattern are configured to radiate light exceeding a threshold dose of light to a first portion of a negative-tone photoresist provided under the first lane of the photomask.

公开(公告)号：US10600789B2

公开(公告)日：2020-03-24

申请号：US16233715

申请日：2018-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soon-mok Ha ,  Jae-hee Kim ,  Chan Hwang ,  Jong-hyuk Kim

IPC: H01L27/108 ,  H01L21/311 ,  H01L21/027 ,  H01L49/02

Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts, selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.

公开(公告)号：US20190157276A1

公开(公告)日：2019-05-23

申请号：US16233715

申请日：2018-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soon-mok HA ,  Jae-hee Kim ,  Chan Hwang ,  Jong-hyuk Kim

IPC: H01L27/108 ,  H01L49/02 ,  H01L21/311 ,  H01L21/027

CPC classification number: H01L27/10855 ,  H01L21/0273 ,  H01L21/31127 ,  H01L21/31144 ,  H01L27/10817 ,  H01L28/87 ,  H01L28/91

Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts , selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.

公开(公告)号：US10204912B2

公开(公告)日：2019-02-12

申请号：US15826944

申请日：2017-11-30

Applicant: Samsung Electronics Co., Ltd.

Inventor： Soon-mok Ha ,  Jae-hee Kim ,  Chan Hwang ,  Jong-hyuk Kim

IPC: H01L27/108 ,  H01L21/311 ,  H01L21/027 ,  H01L49/02

Abstract: A method of forming a micro-pattern including forming a mold layer and a supporting material layer on a substrate, patterning the mold layer and the supporting material layer to form recess patterns, forming conductor patterns in the recess patterns, removing a portion of an upper portion of the supporting material layer for causing upper portions of the conductor patterns to protrude, forming a block copolymer layer on the supporting material layer, processing the block copolymer layer to phase-separate the block copolymer layer into a plurality of block parts, selectively removing some of the phase-separated plurality of block parts, and removing the supporting material layer to expose the mold layer at a position corresponding to each of the removed block parts may be provided.

公开(公告)号：US09659940B2

公开(公告)日：2017-05-23

申请号：US15202874

申请日：2016-07-06

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye-sung Park ,  In-seak Hwang ,  Bo-un Yoon ,  Byoung-ho Kwon ,  Jong-hyuk Park ,  Jae-hee Kim ,  Myung-jae Jang

IPC: H01L21/20 ,  H01L27/108

CPC classification number: H01L27/10852 ,  H01L27/10814 ,  H01L27/10894 ,  H01L27/10897 ,  H01L28/90

Abstract: A method of manufacturing a semiconductor device includes: preparing a wafer in which a first cell area and a second cell area are defined; forming a bottom electrode structure in the first cell area and a dummy structure located in the second cell area; and sequentially forming a dielectric layer and a top electrode on the bottom electrode structure and the dummy structure, wherein the bottom electrode structure includes a plurality of bottom electrodes extending in a first direction in the first cell area and first and second supporters to support the plurality of bottom electrodes, wherein the dummy structure includes a first mold film, a first supporter film, a second mold film, and a second supporter film that are sequentially formed to cover the second cell area, and the second supporter and the second supporter film are at a same level relative to the wafer.