公开(公告)号：US11791236B2

公开(公告)日：2023-10-17

申请号：US17361644

申请日：2021-06-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaebeom Byun ,  Taehoi Hwang

IPC: H01L23/38 ,  H05K7/20 ,  H01L23/12 ,  H01L23/367

CPC classification number: H01L23/38 ,  H01L23/12 ,  H01L23/3677 ,  H05K7/20209

Abstract: A semiconductor module may include a first PCB, at least one first semiconductor chip, a heat sink and at least one first TEC. The at least one semiconductor chip is on the first PCB. The heat sink may be configured to surround the first PCB and the at least one semiconductor control chip. The first TEC may be on the first PCB to cool heat from the first PCB. Thus, performances of the semiconductor module may not be deteriorated by the heat.

公开(公告)号：US20220238541A1

公开(公告)日：2022-07-28

申请号：US17487317

申请日：2021-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaebeom Byun ,  Jongsam Kim ,  Sehwan Park

IPC: H01L27/11526 ,  H01L27/11573 ,  H01L23/38

Abstract: A vertical non-volatile memory device capable of stably maintaining an operating temperature in a chip level, a semiconductor package including the memory device, and a heat dissipation method of the memory device. The vertical non-volatile memory device includes a substrate on which a cell array area and an extension area are defined, a vertical channel structure formed on the substrate, a thermoelectric device including at least two semiconductor pillars formed on the substrate, and a stacked structure on the substrate. The stacked structure includes a gate electrode layer and an interlayer insulation layer which are stacked alternately along sidewalls of the vertical channel structure and the at least two semiconductor pillars. The at least two semiconductor pillars include an n-type semiconductor pillar and a p-type semiconductor pillar which are electrically connected to each other through a conductive layer on the substrate.

公开(公告)号：US12207463B2

公开(公告)日：2025-01-21

申请号：US17487317

申请日：2021-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaebeom Byun ,  Jongsam Kim ,  Sehwan Park

IPC: H01L23/24 ,  H01L23/02 ,  H01L23/38 ,  H10B41/40 ,  H10B43/40

Abstract: A vertical non-volatile memory device capable of stably maintaining an operating temperature in a chip level, a semiconductor package including the memory device, and a heat dissipation method of the memory device. The vertical non-volatile memory device includes a substrate on which a cell array area and an extension area are defined, a vertical channel structure formed on the substrate, a thermoelectric device including at least two semiconductor pillars formed on the substrate, and a stacked structure on the substrate. The stacked structure includes a gate electrode layer and an interlayer insulation layer which are stacked alternately along sidewalls of the vertical channel structure and the at least two semiconductor pillars. The at least two semiconductor pillars include an n-type semiconductor pillar and a p-type semiconductor pillar which are electrically connected to each other through a conductive layer on the substrate.

公开(公告)号：US12087108B2

公开(公告)日：2024-09-10

申请号：US17481595

申请日：2021-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaebeom Byun

IPC: G07C5/08 ,  H05K7/20

CPC classification number: G07C5/085 ,  H05K7/20209

Abstract: A memory apparatus for a vehicle includes a storage apparatus including at least one memory device, a first fluid pipe having a first part that extends along a first outer surface of the storage apparatus, and a second fluid pipe having a second part that extends along a second outer surface of the storage apparatus, the second outer surface being opposite to the first outer surface. A first fluid having a high temperature flows through the first fluid pipe, and a second fluid having a low temperature flows through the second fluid pipe.

公开(公告)号：US11983084B2

公开(公告)日：2024-05-14

申请号：US17531204

申请日：2021-11-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaebeom Byun ,  Eoksoo Shim

IPC: G06F1/26 ,  G06F1/20 ,  G06F11/30 ,  G06F11/34

CPC classification number: G06F11/3058 ,  G06F1/206 ,  G06F11/3034 ,  G06F11/3409

Abstract: In a method of operating a storage device, temperature information is received from a temperature sensor. At least one power control signal and at least one performance control signal are alternately output based on the temperature information. A first temperature control operation and a second temperature control operation are alternately performed based on the at least one power control signal and the at least one performance control signal. The first temperature control operation is performed to control cooling performance of a thermoelectric element included in the storage device based on the at least one power control signal. The second temperature control operation is performed to control a throttling of operating performance of the storage device based on the at least one performance control signal.

公开(公告)号：US20220262176A1

公开(公告)日：2022-08-18

申请号：US17481595

申请日：2021-09-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaebeom Byun

IPC: G07C5/08 ,  H05K7/20

Abstract: A memory apparatus for a vehicle includes a storage apparatus including at least one memory device, a first fluid pipe having a first part that extends along a first outer surface of the storage apparatus, and a second fluid pipe having a second part that extends along a second outer surface of the storage apparatus, the second outer surface being opposite to the first outer surface. A first fluid having a high temperature flows through the first fluid pipe, and a second fluid having a low temperature flows through the second fluid pipe.