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    MEMORY CARD
    1.
    发明申请
    MEMORY CARD 有权
    存储卡

    公开(公告)号：US20160037661A1

    公开(公告)日：2016-02-04

    申请号：US14804316

    申请日：2015-07-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Yu-Sung KIM ,  Jin-Hyuk LEE ,  Il-Mok KANG ,  Seok-Jae HAN

    IPC: H05K5/00 ,  H01R12/72 ,  H01R13/64

    CPC classification number: H01R12/721 ,  H01R13/64

    Abstract: A memory card, comprising: a top surface; a bottom surface on an opposite side of the memory card from the top surface; and a first alignment structure formed on the top surface or the bottom surface and configured to interface with a corresponding second alignment structure of a memory card socket when the memory card is correctly inserted into the memory card socket and configured to substantially prevent full insertion of the memory card when the memory card is incorrectly inserted into the memory card socket.

    Abstract translation: 一种存储卡，包括：顶表面; 存储卡的与顶表面相对的一侧的底表面; 以及第一对准结构，其形成在所述顶表面或底表面上，并且被配置为当所述存储卡被正确地插入所述存储卡插槽中并被配置为基本上防止完全插入所述存储卡插槽时与存储卡插槽的对应的第二对准结构相接合 存储卡未正确插入存储卡插槽时的存储卡。

    SEMICONDUCTOR DEVICE
    2.
    发明申请
    SEMICONDUCTOR DEVICE 有权
    半导体器件

    公开(公告)号：US20150131242A1

    公开(公告)日：2015-05-14

    申请号：US14446289

    申请日：2014-07-29

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Jung-Hoon KIM ,  Jin-Hyuk LEE

    IPC: H05K1/02 ,  H05K1/11 ,  H05K5/00

    CPC classification number: H05K1/0207 ,  H01L23/36 ,  H01L23/52 ,  H01L2224/16225 ,  H01L2924/0002 ,  H01L2924/15311 ,  H01L2924/3511 ,  H05K1/0206 ,  H05K1/0209 ,  H05K1/181 ,  H05K2201/10159 ,  H05K2201/10371 ,  H05K2201/10416 ,  H01L2924/00

    Abstract: Embodiments of the inventive concept include a semiconductor device having a circuit board including a first outer layer, a contact region in the first outer layer, a second layer formed on an opposite side of the first outer layer, a via-hole, and a plurality of inner layers formed to be stacked between the first layer and the second layer. A case may accommodate the circuit board. The case may have a projection portion that is configured to come in contact with the circuit board in the contact region. The plurality of inner layers may include a ground layer. The first outer layer may be connected to the ground layer through a via-hole. The case may be connected to the ground layer through the first outer layer.

    Abstract translation: 本发明构思的实施例包括具有电路板的半导体器件，该电路板包括第一外层，第一外层中的接触区域，形成在第一外层的相对侧上的第二层，通孔和多个 的内层被形成为堆叠在第一层和第二层之间。 一个案例可以容纳电路板。 壳体可以具有突出部分，其被配置为在接触区域中与电路板接触。 多个内层可以包括接地层。 第一外层可以通过通孔连接到接地层。 壳体可以通过第一外层连接到接地层。

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