公开(公告)号：US11903206B2

公开(公告)日：2024-02-13

申请号：US17747174

申请日：2022-05-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jong Seon Ahn ,  Ji Sung Cheon ,  Young Jin Kwon ,  Seok Cheon Baek ,  Woong Seop Lee

IPC: H01L29/66 ,  H10B43/27 ,  H01L21/28 ,  H01L29/423 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L29/40117 ,  H01L29/4234 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: A three-dimensional semiconductor device includes an upper substrate, a gate-stacked structure on the upper substrate, the gate-stacked structure including gate electrodes stacked within a memory cell array region, while being spaced apart from each other in a direction perpendicular to a surface of the upper substrate, and extending into an extension region adjacent to the memory cell array region to be arranged within the extension region to have a staircase shape, and at least one through region passing through the gate-stacked structure within the memory cell array region or the extension region, the at least one through region including a lower region and an upper region wider than the lower region.

公开(公告)号：US11342351B2

公开(公告)日：2022-05-24

申请号：US16257357

申请日：2019-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jong Seon Ahn ,  Ji Sung Cheon ,  Young Jin Kwon ,  Seok Cheon Baek ,  Woong Seop Lee

IPC: H01L23/528 ,  H01L27/11 ,  H01L27/11582 ,  H01L27/1157 ,  H01L29/423 ,  H01L27/11573 ,  H01L27/11565 ,  H01L21/28

Abstract: A three-dimensional semiconductor device includes an upper substrate, a gate-stacked structure on the upper substrate, the gate-stacked structure including gate electrodes stacked within a memory cell array region, while being spaced apart from each other in a direction perpendicular to a surface of the upper substrate, and extending into an extension region adjacent to the memory cell array region to be arranged within the extension region to have a staircase shape, and at least one through region passing through the gate-stacked structure within the memory cell array region or the extension region, the at least one through region including a lower region and an upper region wider than the lower region.