公开(公告)号：US20200185598A1

公开(公告)日：2020-06-11

申请号：US16512503

申请日：2019-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun-sun Noh ,  Ju-hyun Kim ,  Joon-myoung Lee ,  Woo-chang Lim

IPC: H01L43/04 ,  H01L27/22 ,  H01L43/06 ,  H01L43/10 ,  H01L43/14 ,  G11C11/16 ,  H01F10/32 ,  H01F41/30 ,  G11C11/18

Abstract: A magnetic memory device includes a buffer layer on a substrate, a magnetic tunnel junction structure including a fixed layer structure, a tunnel barrier, and a free layer that are sequentially arranged on the buffer layer, and a spin-orbit torque (SOT) structure on the magnetic tunnel junction structure and including a topological insulator material, wherein the free layer includes a Heusler material.

公开(公告)号：US10892400B2

公开(公告)日：2021-01-12

申请号：US16512503

申请日：2019-07-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Eun-sun Noh ,  Ju-hyun Kim ,  Joon-myoung Lee ,  Woo-chang Lim

IPC: H01L43/04 ,  H01L27/22 ,  H01L43/06 ,  H01L43/10 ,  G11C11/16 ,  H01F10/32 ,  H01F41/30 ,  G11C11/18 ,  H01L43/14

Abstract: A magnetic memory device includes a buffer layer on a substrate, a magnetic tunnel junction structure including a fixed layer structure, a tunnel barrier, and a free layer that are sequentially arranged on the buffer layer, and a spin-orbit torque (SOT) structure on the magnetic tunnel junction structure and including a topological insulator material, wherein the free layer includes a Heusler material.

公开(公告)号：US20190123262A1

公开(公告)日：2019-04-25

申请号：US15993862

申请日：2018-05-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Joon-myoung Lee ,  Jae-hoon Kim ,  Yong-sung Park ,  Se-chung Oh ,  Jun-ho Jeong

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  G11C11/16

Abstract: Provided is a semiconductor manufacturing apparatus including a transfer chamber, a first process chamber connected to the transfer chamber, and a second process chamber connected to the transfer chamber. The transfer chamber may be configured to transfer a substrate. The first process chamber may be configured to perform a first oxidation process for oxidizing a metal layer on the substrate at a first temperature. The second process chamber may be configured to perform a second oxidation process for oxidizing a metal layer on the substrate at a second temperature higher than the first temperature.