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公开(公告)号：US20230078373A1
公开(公告)日：2023-03-16
申请号：US17989085
申请日：2022-11-17
发明人： Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Jungho YOON , Youngjin CHO
摘要： A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer and a second layer. The first layer is formed of a first material. The second layer is on the first layer and formed of a second material having a density different from a density of the first material. The first conductive element and a second conductive element are located on the variable resistance layer and spaced apart from each other in order to form a current path in the variable resistance layer. The current path is in a direction perpendicular to a direction in which the first layer and the second layer are stacked.
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公开(公告)号：US20210202833A1
公开(公告)日：2021-07-01
申请号：US16875119
申请日：2020-05-15
发明人： Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Jungho YOON , Youngjin CHO
摘要： A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.
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公开(公告)号：US20200350497A1
公开(公告)日：2020-11-05
申请号：US16691818
申请日：2019-11-22
发明人： Jungho YOON , Soichiro MIZUSAKI , Youngjin CHO
IPC分类号： H01L45/00
摘要： A variable resistance memory device includes a first conductive line extending in a first direction, a second conductive line extending in a second direction, the second direction intersecting the first direction on the first conductive line, a fixed resistance layer between the first conductive line and the second conductive line, and a variable resistance layer between the first conductive line and the second conductive line, wherein the fixed resistance layer and the variable resistance layer are electrically connected in parallel to each other between the first conductive line and the second conductive line.
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公开(公告)号：US20210350851A1
公开(公告)日：2021-11-11
申请号：US17385263
申请日：2021-07-26
摘要： A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
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公开(公告)号：US20210035641A1
公开(公告)日：2021-02-04
申请号：US16775424
申请日：2020-01-29
发明人： Jungho YOON , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Youngjin CHO
IPC分类号： G11C16/10 , H01L27/11582 , G11C16/24 , G11C16/04 , G11C16/26
摘要： Provided are a non-volatile memory device and an operating method thereof. The non-volatile memory device includes a memory cell array having a vertically stacked structure, a bit line for applying a programming voltage to the memory cell array, and a control logic. The memory cell array includes memory cells that each include a corresponding portion of a semiconductor layer and a corresponding portion of a resistance layer. The memory cells include a non-selected memory cell, a compensation memory cell, and a selected memory cell. The control logic is configured to apply an adjusted program voltage to the selected memory cell, based on applying a first voltage to the compensation memory cell, a second voltage to the selected memory cell, and a third voltage to the non-selected memory cell. The adjusted program voltage may be dropped compared to the programming voltage due to the compensation memory cell.
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公开(公告)号：US20200161328A1
公开(公告)日：2020-05-21
申请号：US16662299
申请日：2019-10-24
发明人： Jungho YOON , Soichiro Mizusaki , Youngjin Cho
IPC分类号： H01L27/11582 , H01L21/762 , H01L27/11556 , H01L27/1157
摘要： Provided is a non-volatile memory device including a control logic, a semiconductor layer, a resistance switching layer, a gate oxide layer, and a gate stack including a plurality of gates and a plurality of insulating layers, wherein the plurality of gates and the plurality of insulating layers are stacked alternately with each other. The resistance switching layer is provided between the semiconductor layer and the gate stack. The gate oxide layer is provided between the resistance switching layer and the gate stack. A cell string including a plurality of memory cells is formed by the gate stack, the resistance switching layer, and the gate oxide layer.
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公开(公告)号：US20230337555A1
公开(公告)日：2023-10-19
申请号：US18338707
申请日：2023-06-21
发明人： Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI , Jungho YOON , Youngjin CHO
IPC分类号： H01L47/00
CPC分类号： H10N70/231 , H10N70/8833 , H10B63/80
摘要： A variable resistance memory device includes a variable resistance layer, a first conductive element, and a second conductive element. The variable resistance layer includes a first layer including a first material and a second layer on the first layer and the second layer including a second material. The second material has a different valence than a valence of the first material. The first conductive element and the second conductive element are on the variable resistance layer and separated from each other to form an electric current path in the variable resistance layer in a direction perpendicular to a direction in which the first layer and the second layer are stacked.
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公开(公告)号：US20210217473A1
公开(公告)日：2021-07-15
申请号：US17146999
申请日：2021-01-12
发明人： Youngjin CHO , Jungho YOON , Seyun KIM , Jinhong KIM , Soichiro MIZUSAKI
摘要： A vertical nonvolatile memory device including a memory cell string using a resistance change material is disclosed. Each memory cell string of the nonvolatile memory device includes a semiconductor layer extending in a first direction and having a first surface opposite a second surface, a plurality of gates and a plurality of insulators alternately arranged in the first direction and extending in a second direction perpendicular to the first direction, a gate insulating layer extending in the first direction between the plurality of gates and the semiconductor layer and between the plurality of insulators and the semiconductor layer, and a dielectric film extending in the first direction on the surface of the semiconductor layer and having a plurality of movable oxygen vacancies distributed therein.
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公开(公告)号：US20210193207A1
公开(公告)日：2021-06-24
申请号：US16876553
申请日：2020-05-18
发明人： Soichiro MIZUSAKI , Jungho YOON , Youngjin CHO
摘要： A nonvolatile memory cell resistance change type nonvolatile memory cell configured to store information by changing an electrical resistance according to application of electrical stress is provided and a nonvolatile memory device including the nonvolatile memory cell is provided. The resistance change type nonvolatile memory cell includes a resistance change material layer including a resistance change material; a ferroelectric layer on a first side of the resistance change material layer, the ferroelectric layer configured to change an electrical resistance of the resistance change material layer according to a polarization direction and polarization size of a ferroelectric therein; a first electrode on the ferroelectric layer and configured to control the polarization direction and the polarization size of the ferroelectric based on an applied voltage; and a second electrode and a third electrode on the resistance change material layer with the first electrode therebetween.
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公开(公告)号：US20210035635A1
公开(公告)日：2021-02-04
申请号：US16802803
申请日：2020-02-27
发明人： Jungho YOON , Cheolseong HWANG , Soichiro MIZUSAKI , Youngjin CHO
摘要： A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
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