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公开(公告)号：US12156326B2
公开(公告)日：2024-11-26
申请号：US17833184
申请日：2022-06-06
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Seungbo Shim , Junghoon Park , Jinyoung Bang
Abstract: An electronic device includes: a first printed circuit board (PCB) including a first plate and a first hole formed in the first plate, a second PCB including a second plate, an interposer including a third plate positioned between the first plate and the second plate, a plurality of first vias connecting the first plate and the third plate, a plurality of second vias connecting the second plate and the third plate, and a first reinforcement portion positioned in the first hole to bond the first plate and the third plate.
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公开(公告)号：US09704590B2
公开(公告)日：2017-07-11
申请号：US15259765
申请日：2016-09-08
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sang-Wan Nam , Kang-Bin Lee , Junghoon Park
IPC: G01C11/34 , G11C16/26 , G11C16/04 , G11C16/34 , H01L27/1157 , H01L27/11582 , G11C16/12 , G11C16/16
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3459 , H01L27/1157 , H01L27/11582
Abstract: An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.
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公开(公告)号：US09466387B2
公开(公告)日：2016-10-11
申请号：US14790572
申请日：2015-07-02
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sang-Wan Nam , Kang-Bin Lee , Junghoon Park
CPC classification number: G11C16/26 , G11C16/0483 , G11C16/12 , G11C16/16 , G11C16/34 , G11C16/3459 , H01L27/1157 , H01L27/11582
Abstract: An operating method of a nonvolatile memory, which includes a plurality of cell strings, each cell string having a plurality of memory cells and a string selection transistor stacked on a substrate, includes detecting threshold voltages of the string selection transistors of the plurality of cell strings; adjusting voltages to be supplied to the string selection transistors according to the detected threshold voltages; and applying the adjusted voltages to the string selection transistors to select or unselect the plurality of cell strings during a programming operation.
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公开(公告)号：US11326599B2
公开(公告)日：2022-05-10
申请号：US16689350
申请日：2019-11-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Sunghea Cho , Eunsuk Kim , Junghoon Park , Jongcheun Seo , Namkyu Cho
Abstract: A compressor including a compression unit comprising an inlet for sucking gas and configured to compress the sucked gas; and a casing configured to accommodate the compression unit; and a suction guide comprising a passage for guiding the gas from an outside of the casing to the inlet. The compression unit includes a first surface extending from an edge of the inlet, the suction guide includes a second surface extending from an edge of a vent of the passage, and provided in an internal area of the casing to make the first surface and the second surface face each other, and an external end of the first surface and an internal end of the second surface or an internal end of the first surface and an external end of the second surface do not overlap along a direction of an axis of the compressor.
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公开(公告)号：US11191440B2
公开(公告)日：2021-12-07
申请号：US16359189
申请日：2019-03-20
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seunggoo Kang , Dongil Son , Junghoon Park
Abstract: An electronic device includes a light emitter emitting visible light, an infrared emitter emitting infrared light, at least one detector detecting an electromagnetic wave, and at least one processor configured to obtain a user input to obtain spectral data of a target object, in response to obtaining the user input, emit the visible light by using the light emitter and emit the infrared light by using the infrared emitter, obtain a first reflected signal of the visible light reflected by the target object and a second reflected signal of the infrared light reflected by the target object, using the at least one detector, and generate the spectral data of the target object based on the first reflected signal and the second reflected signal.
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Patent Agency Ranking
公开(公告)号：US10585513B2
公开(公告)日：2020-03-10
申请号：US15974101
申请日：2018-05-08
Applicant: Samsung Electronics Co., Ltd.
Inventor： Junghoon Park , Jungchul An , Seunggoo Kang , Yonghwa Kim , Hyunwoo Sim , Seungbum Choi , Dongil Son
Abstract: An electronic device including a force sensor integrated with a display is provided. The electronic device includes a display; a biometric sensor disposed under the display; a circuit board including the biometric sensor on a first surface thereof; and a force sensor formed on a second surface of the circuit board. The force sensor comprises a first electrode layer facing the second surface; a dielectric layer disposed under the first electrode layer; and a second electrode layer disposed under the dielectric layer and connected to a ground of the electronic device.
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公开(公告)号：US10566233B2
公开(公告)日：2020-02-18
申请号：US16534195
申请日：2019-08-07
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dohyun Lee , Youngwoo Park , Junghoon Park , Jaeduk Lee
IPC: H01L21/00 , H01L21/768 , H01L27/11582 , H01L27/11575 , H01L27/11573 , H01L23/532 , H01L23/522 , H01L27/1157 , H01L23/528
Abstract: A semiconductor device includes a semiconductor pattern on a semiconductor substrate, a three-dimensional memory array on the semiconductor pattern, and a peripheral interconnection structure between the semiconductor pattern and the semiconductor substrate. The peripheral interconnection structure includes an upper interconnection structure on a lower interconnection structure. The upper interconnection structure includes an upper interconnection and an upper barrier layer. The lower interconnection structure includes a lower interconnection and a lower barrier layer. The upper barrier layer is under a bottom surface of the upper interconnection and does not cover side surfaces of the upper interconnection. The lower barrier layer is under a bottom surface of the lower interconnection and covers side surfaces of the lower interconnection.
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公开(公告)号：US20180164850A1
公开(公告)日：2018-06-14
申请号：US15809936
申请日：2017-11-10
Applicant: Samsung Electronics Co., Ltd.
Inventor： Hyunwoo Sim , Yonghwa Kim , Junghoon Park , Jungchul An , Seungbum Choi , Dongil Son
CPC classification number: G06F1/165 , G06F1/1626 , G06F1/1647 , G06F1/1652 , G06F2200/1614 , G09G5/14 , G09G2340/0492 , G09G2354/00 , G09G2360/04 , H04M1/0268 , H04M2250/16
Abstract: An electronic device having a bended display and a method for controlling the same. The electronic device includes a front display area and at least two separate side display areas that are physically connected with at least one side of the front display area and form a convex curved surface in at least one space between the front and the rear of the electronic device. The electronic device also includes and a non-display area that physically connects at least two side display areas of the at least two separate side display areas and forms a convex double curvature surface in at least another space between the front and the rear of the electronic device. The at least two physically connected side display areas may be bent in directions so that an acute angle, a right angle or an obtuse angle is formed.
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公开(公告)号：US09552884B2
公开(公告)日：2017-01-24
申请号：US15238740
申请日：2016-08-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sang-Wan Nam , Won-Taeck Jung , Junghoon Park
CPC classification number: G11C16/14 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/16 , G11C16/3418 , G11C16/344 , G11C16/3445 , H01L27/115
Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
Abstract translation: 非易失性存储器的擦除方法包括向衬底提供擦除电压，将选择字线电压提供给与非易失性存储器的存储块内的选定子块相连的字线，将非选择字线电压提供给 在从提供擦除电压的时间点起的第一延迟时间期间，与存储器块内的未选择子块相连的字线，然后浮动与未选择的子块相连的字线。
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公开(公告)号：US09281070B2
公开(公告)日：2016-03-08
申请号：US14644247
申请日：2015-03-11
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Sang-Wan Nam , Won-Taeck Jung , Junghoon Park
CPC classification number: G11C16/14 , G11C16/0466 , G11C16/0483 , G11C16/08 , G11C16/16 , G11C16/3418 , G11C16/344 , G11C16/3445 , H01L27/115
Abstract: An erase method of a nonvolatile memory includes supplying an erase voltage to a substrate, supplying a selection word line voltage to word lines connected with a selected sub-block within a memory block of the nonvolatile memory, supplying a non-selection word line voltage to word lines connected with an unselected sub-block within the memory block during a first delay time from a point of time when the erase voltage is supplied, and thereafter floating the word lines connected with the unselected sub-block.
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