公开(公告)号：US20180114794A1

公开(公告)日：2018-04-26

申请号：US15784635

申请日：2017-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byong-hyun JANG ,  Dongchul YOO ,  Woojin JANG ,  Jaeyoung AHN ,  Junkyu YANG

IPC: H01L27/11582 ,  H01L23/528 ,  H01L29/51 ,  H01L27/11568 ,  H01L21/311 ,  H01L21/762 ,  H01L21/28 ,  H01L29/10 ,  H01L29/06

CPC classification number: H01L27/11582 ,  H01L21/28282 ,  H01L21/31111 ,  H01L21/76224 ,  H01L23/528 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/1157 ,  H01L29/0649 ,  H01L29/1037 ,  H01L29/513 ,  H01L29/518

Abstract: A semiconductor device includes word lines vertically stacked on top of each other on a substrate, insulating patterns between the word lines, a vertical pillar connected to the substrate, and residual sacrificial patterns on the substrate at sides of the word lines. The vertical pillar penetrates the word lines and the insulating patterns. Each of the insulating patterns includes a first portion between the word lines and a second portion extending from the first portion and between the residual sacrificial patterns. A first thickness of the first portion is smaller than a second thickness of the second portion.