公开(公告)号：US20240172416A1

公开(公告)日：2024-05-23

申请号：US18240512

申请日：2023-08-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jonghyeok KIM ,  Kang In KIM ,  Kyuwan KIM ,  Min-Cheol KIM ,  Youngseok KIM ,  Taewoong OH

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/482 ,  H10B12/485 ,  H10B12/488

Abstract: A semiconductor device includes a substrate having a substrate groove extending in a first direction, a gate insulating layer conformally covering an inner wall of the substrate groove, a metal-containing pattern on the gate insulating layer and filling a lower portion of the substrate groove, a silicon pattern on the metal-containing pattern in the substrate groove, and a word line capping pattern on the silicon pattern in the substrate groove, wherein the silicon pattern includes a first silicon pattern covering an upper surface of the metal-containing pattern and a sidewall of the gate insulating layer and having a pattern groove formed thereon and a second silicon pattern filling the pattern groove, the first silicon pattern having a first impurity concentration, and the second silicon pattern having a second impurity concentration less than the first impurity concentration.

公开(公告)号：US20240222123A1

公开(公告)日：2024-07-04

申请号：US18356322

申请日：2023-07-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kang In KIM ,  Si Nyeon KIM ,  Jiho PARK ,  Youngwoo SON ,  Ji-Eun LEE ,  Young-Seung CHO

IPC: H01L21/033 ,  H01L21/308 ,  H01L21/311 ,  H01L29/423 ,  H01L29/66

CPC classification number: H01L21/0337 ,  H01L21/0332 ,  H01L21/3086 ,  H01L21/31144 ,  H01L29/4236 ,  H01L29/6653 ,  H01L29/6656

Abstract: A method of fabricating a semiconductor device may include forming an active pattern on a substrate, sequentially forming on the substrate a base mask, a first mask layer, a first capping layer, a second mask layer, a second capping layer, a third mask layer, a third capping layer, a fourth mask layer, and a fourth capping layer, forming first spacers, forming second spacers, forming third spacers, and using the third spacers as a mask to pattern the first mask layer and the first capping layer. Forming the third spacers may include forming a spacer layer to completely fill a space between the sidewalls of patterns of the patterned second mask layer.