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公开(公告)号:US20240357799A1
公开(公告)日:2024-10-24
申请号:US18508833
申请日:2023-11-14
发明人: Choong Hyun LEE , Joon Cheol KIM , Kang-Uk KIM , Jin A KIM , Byoung Wook JANG , Young-Seung CHO
CPC分类号: H10B12/482 , G11C5/063 , H10B12/315 , H10B12/485 , H10B12/488 , H10B12/50
摘要: There is provided a semiconductor memory device capable of improving performance and reliability of an element. The semiconductor memory device includes a substrate including a cell region and a peripheral region, a cell region isolation layer in the substrate, isolating the cell region from the peripheral region, an isolation active region surrounded by the cell region isolation layer, a bit line structure on the cell region, including a cell conductive line and a cell gate electrode in the substrate of the cell region, crossing the cell conductive line.
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公开(公告)号:US20240222123A1
公开(公告)日:2024-07-04
申请号:US18356322
申请日:2023-07-21
发明人: Kang In KIM , Si Nyeon KIM , Jiho PARK , Youngwoo SON , Ji-Eun LEE , Young-Seung CHO
IPC分类号: H01L21/033 , H01L21/308 , H01L21/311 , H01L29/423 , H01L29/66
CPC分类号: H01L21/0337 , H01L21/0332 , H01L21/3086 , H01L21/31144 , H01L29/4236 , H01L29/6653 , H01L29/6656
摘要: A method of fabricating a semiconductor device may include forming an active pattern on a substrate, sequentially forming on the substrate a base mask, a first mask layer, a first capping layer, a second mask layer, a second capping layer, a third mask layer, a third capping layer, a fourth mask layer, and a fourth capping layer, forming first spacers, forming second spacers, forming third spacers, and using the third spacers as a mask to pattern the first mask layer and the first capping layer. Forming the third spacers may include forming a spacer layer to completely fill a space between the sidewalls of patterns of the patterned second mask layer.
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