公开(公告)号：US20230041059A1

公开(公告)日：2023-02-09

申请号：US17857395

申请日：2022-07-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： DONG-WAN KIM ,  Keonhee PARK ,  DONG-SIK PARK ,  Joonsuk PARK ,  JIHOON CHANG ,  HYEON-WOO JANG

IPC: H01L27/108

Abstract: A semiconductor device may include a substrate including a cell region, a peripheral region, and a boundary region between the cell region and the peripheral region, bit lines provided on the cell region and extended in a first direction parallel to a top surface of the substrate, bit line capping patterns provided on the bit lines, and a boundary pattern provided on the boundary region. End portions of the bit lines may be in contact with a first interface of the boundary pattern, and the bit line capping patterns may include the same material as the boundary pattern.

公开(公告)号：US20230146012A1

公开(公告)日：2023-05-11

申请号：US17954394

申请日：2022-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： HYEON-WOO JANG ,  DONG-WAN KIM ,  Keonhee PARK ,  DONG-SIK PARK ,  SOOHO SHIN ,  JIHOON CHANG

IPC: H01L27/108 ,  G11C5/06

CPC classification number: H01L27/10814 ,  G11C5/063 ,  H01L27/10823 ,  H01L27/10897

Abstract: Disclosed are semiconductor memory devices and their fabrication methods. The semiconductor memory device comprises a semiconductor substrate that includes a cell array region and a peripheral region, a plurality of bottom electrodes on the semiconductor substrate on the cell array region, a dielectric layer that conformally covers sidewalls and top surfaces of the bottom electrodes, and a top electrode on the dielectric layer and between the bottom electrodes. The top electrode includes a first metal layer, a silicon-germanium layer, a second metal layer, and a silicon layer that are sequentially stacked. An amount of boron in the silicon-germanium layer is greater than an amount of boron in the silicon layer.

公开(公告)号：US20230039149A1

公开(公告)日：2023-02-09

申请号：US17747423

申请日：2022-05-18

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong-Wan KIM ,  Keonhee PARK ,  Dong-Sik PARK ,  Joonsuk PARK ,  Jihoon CHANG ,  Hyeon-Woo JANG

IPC: H01L27/108 ,  H01L21/3213

Abstract: Disclosed are semiconductor devices and their fabrication methods. The semiconductor device comprises a substrate including a peripheral block and cell blocks each including a cell center region, a cell edge region, and a cell middle region, and bit lines extending on each cell block in a first direction. The bit lines include center bit lines, middle bit lines, and edge bit lines. The bit line has first and second lateral surfaces opposite to each other in a second direction. The first lateral surface straightly extends along the first direction on the cell center region, the cell middle region, and the cell edge region. The second lateral surface straightly extends along the first direction on the cell center region and the cell edge region, and the second lateral surface extends along a third direction, that intersects the first direction and the second direction, on the cell middle region.