公开(公告)号：US20140167289A1

公开(公告)日：2014-06-19

申请号：US14187357

申请日：2014-02-24

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Tae PARK ,  Kang-Wook LEE ,  Hyun-Kyoung KIM

IPC: H01L23/538 ,  H01L23/00

CPC classification number: H01L23/5384 ,  H01L21/76898 ,  H01L23/481 ,  H01L24/05 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

Abstract: A semiconductor device includes a substrate, and a through electrode passing through the substrate. The semiconductor device has a pad region and a through electrode region. A pad covers the pad region, extends into the through electrode region, and delimits an opening in the through electrode region. A through electrode extends through the semiconductor substrate below the hole in the pad in the through region.

Abstract translation: 半导体器件包括衬底和穿过衬底的通孔。 半导体器件具有焊盘区域和贯通电极区域。 焊盘覆盖焊盘区域，延伸到通孔电极区域中，并限定通孔电极区域中的开口。 穿通电极通过穿通区域中的垫中的孔下方的半导体衬底延伸。

公开(公告)号：US20140185378A1

公开(公告)日：2014-07-03

申请号：US14198608

申请日：2014-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki-Tae PARK ,  Ki-Nam KIM ,  Yeong-Taek LEE

IPC: G11C16/04 ,  G11C16/10

CPC classification number: G11C16/0408 ,  G11C11/5621 ,  G11C16/0483 ,  G11C16/10 ,  G11C2211/5641 ,  G11C2211/5642

Abstract: A flash memory device includes a plurality of memory blocks. A selected memory block among the plurality of memory blocks includes 2″ pages of data. The selected memory block includes different types of memory cells capable of storing different numbers of bits.

Abstract translation: 闪存器件包括多个存储器块。 多个存储块中的所选存储块包括2“数据页。 所选存储块包括能够存储不同位数的不同类型的存储单元。

公开(公告)号：US20140129902A1

公开(公告)日：2014-05-08

申请号：US14068122

申请日：2013-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyun-Jun YOON ,  Jae-Yong JEONG ,  Myoung-Hoon CHOI ,  Bo-Geun KIM ,  Ki-Tae PARK

IPC: G11C16/26 ,  G06F11/10

CPC classification number: G11C16/26 ,  G06F11/1048 ,  G11C11/5642 ,  G11C16/3422 ,  G11C2029/0411 ,  G11C2211/5641

Abstract: A memory device useable with a memory system includes a voltage generator to a plurality of first candidate voltages and a plurality of second candidate voltages, and an X decoder to sequentially apply each of the plurality of first candidate voltages and each of the plurality of second candidate voltages to one or more cells of a memory cell array, and then to apply one of the plurality of first candidate voltages and one of the plurality of second candidate voltages as a first read voltage and a second voltage, respectively, to read data from the cells of the memory cell array according to a characteristic of the cells of the memory cell array.

Abstract translation: 可与存储器系统一起使用的存储装置包括电压发生器到多个第一候选电压和多个第二候选电压，以及X解码器，以顺序地施加多个第一候选电压中的每一个，并且多个第二候选 电压到存储单元阵列的一个或多个单元，然后分别施加多个第一候选电压和多个第二候选电压中的一个作为第一读取电压和第二电压以从 根据存储单元阵列的单元的特性，存储单元阵列的单元。