公开(公告)号：US20200083162A1

公开(公告)日：2020-03-12

申请号：US16385373

申请日：2019-04-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kiho YANG

IPC: H01L23/522 ,  H01L23/528 ,  H01L23/532

Abstract: Disclosed is a semiconductor device comprising a substrate, a first dielectric layer and a second dielectric layer that are sequentially stacked on the substrate, a contact that penetrates the first dielectric layer and extends toward the substrate, and a conductive line that is provided in the second dielectric layer and electrically connected to the contact, The conductive line extends in a first direction. The contact comprises a lower segment in the first dielectric layer and an upper segment in the second dielectric layer. A width in a second direction of the conductive line decreases with decreasing distance from the substrate. The second direction intersects the first direction. A sidewall of the upper segment of the contact is in contact with the conductive line.

公开(公告)号：US20230205092A1

公开(公告)日：2023-06-29

申请号：US17954975

申请日：2022-09-28

Applicant: Samsung Electronics Co., Ltd.

Inventor： Arin LEE ,  Kiho YANG ,  Jeeeun JUNG ,  Sungyong MOON ,  Junyoung JANG

IPC: G03F7/20 ,  G06F30/398

CPC classification number: G03F7/70441 ,  G03F7/705 ,  G06F30/398

Abstract: An optical proximity correction (OPC) method for manufacturing a semiconductor chip including detecting edges of an initial layout pattern and determining an edge violating a mask rule, among the edges, as a target edge, setting a reference control point (RCP) on the target edge, forming a multi-edge by dividing the target edge based on the RCP, setting additional control points on the multi-edge, forming a modified layout pattern by transforming the multi-edge into a curved edge based on the RCP and the additional control points, performing an OPC simulation based on the modified layout pattern, and calculating an edge placement error (EPE) of the modified layout pattern based on a result of the OPC simulation may be provided.

公开(公告)号：US20150110383A1

公开(公告)日：2015-04-23

申请号：US14340910

申请日：2014-07-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kiho YANG ,  Seunghune YANG ,  Sibo CAI

IPC: G06T7/00 ,  G06T11/60 ,  G06K9/46

CPC classification number: G01N21/956 ,  G01N21/88 ,  G01N21/8851 ,  G03F7/70616 ,  G06K9/4604 ,  G06T7/0006 ,  G06T7/001 ,  G06T11/60 ,  G06T2207/20221 ,  G06T2207/30148

Abstract: Inventive concepts provide a method of inspecting a semiconductor device including obtaining inspection image data of an inspection pattern of an inspection layer on a substrate. The method may include extracting inspection contour data including an inspection pattern contour from the inspection image data, and merging the inspection contour data with comparison contour data of a comparison layer to obtain merged data. The comparison layer may overlap the inspection layer. The method may also include determining a horizontal distance between the inspection pattern contour and a comparison pattern contour of the comparison contour data based on the merged data.

Abstract translation: 本发明的概念提供了一种检查半导体器件的方法，包括获得在衬底上检查层的检查图案的检查图像数据。 该方法可以包括从检查图像数据提取包括检查图案轮廓的检查轮廓数据，并且将检查轮廓数据与比较层的比较轮廓数据合并以获得合并的数据。 比较层可以与检查层重叠。 该方法还可以包括基于合并的数据确定检查图案轮廓和比较轮廓数据的比较花样轮廓之间的水平距离。