公开(公告)号：US09941280B2

公开(公告)日：2018-04-10

申请号：US15228292

申请日：2016-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kwan-Young Kim ,  Jae-Hyun Yoo ,  Jin-Hyun Noh ,  Woo-Yeol Maeng ,  Yong-Woo Jeon

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/06 ,  H01L29/423 ,  H01L29/08 ,  H01L23/528

CPC classification number: H01L27/0886 ,  H01L23/528 ,  H01L29/0649 ,  H01L29/0653 ,  H01L29/0865 ,  H01L29/0873 ,  H01L29/0882 ,  H01L29/4232 ,  H01L29/4236 ,  H01L29/7816 ,  H01L29/7835 ,  H01L29/785

Abstract: According to example embodiments, a semiconductor device includes a first fin, a second fin that is separated from the first fin, and a gate on the first fin and the second fin. The gate crosses the first fin and the second fin. The first fin includes a first doped area at both sides of the gate. The first doped area is configured to have a first voltage applied thereto. The second fin includes a second doped area at both sides of the gate. The second doped area is configured to have a second voltage applied thereto. The second voltage is different than the first voltage.

公开(公告)号：US20160372593A1

公开(公告)日：2016-12-22

申请号：US15052177

申请日：2016-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun YOO ,  Kwan-Young Kim ,  Jin-Hyun Noh ,  Kee-Moon Chun ,  Yong-Woo Jeon

IPC: H01L29/78 ,  H01L21/324 ,  H01L21/265 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/7816 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66795 ,  H01L29/7835 ,  H01L29/7851

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.

Abstract translation: 半导体器件包括：第一阱，其布置在衬底中并且包括第一导电类型的第一杂质;第二阱，设置在衬底中，包括不同于第一导电类型的第二导电类型的第二杂质，并且首先 第三部分和形成在第一阱和第二阱上的栅极结构，其中第二部分设置在第一部分和第三部分之间，第一部分和第三部分形成得比第二部分更深，并且浓度 第一部分和第三部分的第二杂质大于第二部分的第二杂质的浓度。

公开(公告)号：US10084079B2

公开(公告)日：2018-09-25

申请号：US15052177

申请日：2016-02-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Hyun Yoo ,  Kwan-Young Kim ,  Jin-Hyun Noh ,  Kee-Moon Chun ,  Yong-Woo Jeon

IPC: H01L29/66 ,  H01L29/78 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7816 ,  H01L29/0847 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66795 ,  H01L29/7835 ,  H01L29/785 ,  H01L29/7851

Abstract: A semiconductor device includes a first well disposed in a substrate and including a first impurity of a first conductivity type, a second well disposed in the substrate, including a second impurity of a second conductivity type different from the first conductivity type, and having first to third portions, and a gate structure formed on the first well and the second well, wherein the second portion is disposed between the first portion and the third portion, the first portion and the third portion are formed deeper than the second portion, and concentration of the second impurity of the first portion and the third portion is greater than concentration of the second impurity of the second portion.