公开(公告)号：US11475956B2

公开(公告)日：2022-10-18

申请号：US17234175

申请日：2021-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chaehoon Kim ,  Junyoung Ko ,  Sangwan Nam ,  Minjae Seo ,  Jiwon Seo ,  Hojun Lee

IPC: G11C16/08 ,  G11C16/20 ,  G11C16/16 ,  G11C16/04 ,  G11C16/30 ,  G11C16/34 ,  G11C16/26

Abstract: A method of operating a nonvolatile memory device which includes at least one memory block is provided. The method includes providing a plurality of word-lines with a voltage during a word-line set-up period, precharging a plurality of driving lines with a voltage during a word-line development period, detecting a voltage drop of a sensing node during a sensing period, and detecting leakage based on the voltage drop.

公开(公告)号：US12277995B2

公开(公告)日：2025-04-15

申请号：US17988797

申请日：2022-11-17

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin-Young Chun ,  Minjae Seo ,  Moosung Kim

IPC: G11C7/10 ,  G11C7/12 ,  G11C7/20

Abstract: A non-volatile memory device includes: a memory cell; a bit line connected to the memory cell; a first cross coupled inverter for storing data sensed from the memory cell through a sensing node connected to the bit line; a first transistor and a second transistor respectively connected to respective ends of the first cross coupled inverter and respectively transmitting a ground voltage to respective ends of the first cross coupled inverter; and a control circuit for operating the first transistor and the second transistor at least once for at least one of an initialize period in which the sensing node is discharged and a precharge period in which the bit line is precharged.

公开(公告)号：US12300329B2

公开(公告)日：2025-05-13

申请号：US17881039

申请日：2022-08-04

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yongsung Cho ,  Minjae Seo ,  Kyoman Kang ,  Byungsoo Kim

IPC: G11C16/30 ,  G11C16/04 ,  G11C16/08 ,  G11C16/26

Abstract: Provided is a memory device with a vertical channel structure. The memory device includes a memory cell array including a plurality of memory cells and a plurality of string selection lines, a negative charge pump configured to generate a bias voltage of a negative level, to be applied to at least one of the plurality of string selection lines, and a control logic circuit configured to apply, for a first period, a prepulse voltage to at least one unselected string selection line among the plurality of string selection lines excluding a selected string selection line to which a memory cell selected from among the plurality of memory cells is connected and thereafter apply the bias voltage to the at least one unselected string selection line so as to perform a read operation on the selected memory cell.

公开(公告)号：US11798626B2

公开(公告)日：2023-10-24

申请号：US17947320

申请日：2022-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Chaehoon Kim ,  Junyoung Ko ,  Sangwan Nam ,  Minjae Seo ,  Jiwon Seo ,  Hojun Lee

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/20 ,  G11C16/16 ,  G11C16/04 ,  G11C16/30 ,  G11C16/26

CPC classification number: G11C16/08 ,  G11C16/0425 ,  G11C16/16 ,  G11C16/20 ,  G11C16/26 ,  G11C16/30 ,  G11C16/3404

Abstract: A method of operating a nonvolatile memory device which includes at least one memory block is provided. The method includes providing a plurality of word-lines with a voltage during a word-line set-up period, precharging a plurality of driving lines with a voltage during a word-line development period, detecting a voltage drop of a sensing node during a sensing period, and detecting leakage based on the voltage drop.