公开(公告)号：US20200168611A1

公开(公告)日：2020-05-28

申请号：US16566510

申请日：2019-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-hyeon Jeon ,  Se-keun Park ,  Dong-sik Park ,  Seok-ho Shin

IPC: H01L27/108 ,  H01L29/06 ,  H01L29/423 ,  H01L21/28 ,  H01L21/306

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a plurality of active regions that extend longitudinally in a direction and an isolation region that electrically isolates the plurality of active regions from each other. The semiconductor device includes a gate trench that extends across the plurality of active regions and the isolation region. The semiconductor device includes a gate structure that extends in the gate trench. The semiconductor device includes a gate dielectric layer that is between the gate trench and the gate structure, in each of the plurality of active regions. The gate structure has a first width in the direction in each of the plurality of active regions and has a second width in the direction in the isolation region that is different from the first width.

公开(公告)号：US20150294923A1

公开(公告)日：2015-10-15

申请号：US14645954

申请日：2015-03-12

Applicant: Samsung Electronics Co.,Ltd.

Inventor： Seok-ho Shin

IPC: H01L23/48 ,  H01L27/108 ,  H01L23/50

CPC classification number: H01L27/10885 ,  H01L21/31111 ,  H01L21/76802 ,  H01L23/481 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a substrate having a plurality of active regions; a plurality of bit lines extending in a first direction, the plurality of bit lines being separate from the substrate with an insulating layer therebetween; a plurality of first insulating lines extending in a second direction that is different from the first direction, wherein the plurality of first insulating lines intersect the plurality of bit lines and have upper surfaces having levels which are higher than those of upper surfaces of the plurality of bit lines relative to the substrate; and a plurality of first contact structures connected to the plurality of active regions, the plurality of first contact structures being disposed in an area defined by the plurality of bit lines and the plurality of first insulating lines.

Abstract translation: 半导体器件包括：具有多个有源区的衬底; 多个位线沿着第一方向延伸，所述多个位线与所述基板分离，所述多个位线之间具有绝缘层; 多个第一绝缘线，沿与第一方向不同的第二方向延伸，其中多个第一绝缘线与多个位线相交，并且具有比多个位线的上表面的电平高的电平的上表面 相对于衬底的位线; 以及连接到所述多个有源区域的多个第一接触结构，所述多个第一接触结构设置在由所述多个位线和所述多个第一绝缘线限定的区域中。

公开(公告)号：US09761593B2

公开(公告)日：2017-09-12

申请号：US15214145

申请日：2016-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-ho Shin

IPC: H01L21/20 ,  H01L27/108 ,  H01L23/48 ,  H01L21/311 ,  H01L21/768 ,  H01L29/06

CPC classification number: H01L27/10885 ,  H01L21/31111 ,  H01L21/76802 ,  H01L23/481 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a substrate having a plurality of active regions; a plurality of bit lines extending in a first direction, the plurality of bit lines being separate from the substrate with an insulating layer therebetween; a plurality of first insulating lines extending in a second direction that is different from the first direction, wherein the plurality of first insulating lines intersect the plurality of bit lines and have upper surfaces having levels which are higher than those of upper surfaces of the plurality of bit lines relative to the substrate; and a plurality of first contact structures connected to the plurality of active regions, the plurality of first contact structures being disposed in an area defined by the plurality of bit lines and the plurality of first insulating lines.

公开(公告)号：US09431324B2

公开(公告)日：2016-08-30

申请号：US14645954

申请日：2015-03-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-ho Shin

IPC: H01L21/02 ,  H01L23/48 ,  H01L27/108

CPC classification number: H01L27/10885 ,  H01L21/31111 ,  H01L21/76802 ,  H01L23/481 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a substrate having a plurality of active regions; a plurality of bit lines extending in a first direction, the plurality of bit lines being separate from the substrate with an insulating layer therebetween; a plurality of first insulating lines extending in a second direction that is different from the first direction, wherein the plurality of first insulating lines intersect the plurality of bit lines and have upper surfaces having levels which are higher than those of upper surfaces of the plurality of bit lines relative to the substrate; and a plurality of first contact structures connected to the plurality of active regions, the plurality of first contact structures being disposed in an area defined by the plurality of bit lines and the plurality of first insulating lines.

Abstract translation: 半导体器件包括：具有多个有源区的衬底; 多个位线沿着第一方向延伸，所述多个位线与所述基板分离，所述多个位线之间具有绝缘层; 多个第一绝缘线，沿与第一方向不同的第二方向延伸，其中多个第一绝缘线与多个位线相交，并且具有比多个位线的上表面的电平高的电平的上表面 相对于衬底的位线; 以及连接到所述多个有源区域的多个第一接触结构，所述多个第一接触结构设置在由所述多个位线和所述多个第一绝缘线限定的区域中。

公开(公告)号：US11177264B2

公开(公告)日：2021-11-16

申请号：US16566510

申请日：2019-09-10

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-hyeon Jeon ,  Se-keun Park ,  Dong-sik Park ,  Seok-ho Shin

IPC: H01L27/108 ,  H01L29/06 ,  H01L29/423 ,  H01L21/306 ,  H01L21/28

Abstract: Semiconductor devices are provided. A semiconductor device includes a substrate including a plurality of active regions that extend longitudinally in a direction and an isolation region that electrically isolates the plurality of active regions from each other. The semiconductor device includes a gate trench that extends across the plurality of active regions and the isolation region. The semiconductor device includes a gate structure that extends in the gate trench. The semiconductor device includes a gate dielectric layer that is between the gate trench and the gate structure, in each of the plurality of active regions. The gate structure has a first width in the direction in each of the plurality of active regions and has a second width in the direction in the isolation region that is different from the first width.

公开(公告)号：US20160329338A1

公开(公告)日：2016-11-10

申请号：US15214145

申请日：2016-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seok-ho Shin

IPC: H01L27/108 ,  H01L21/311 ,  H01L21/768 ,  H01L29/06

CPC classification number: H01L27/10885 ,  H01L21/31111 ,  H01L21/76802 ,  H01L23/481 ,  H01L27/10852 ,  H01L27/10855 ,  H01L27/10876 ,  H01L27/10888 ,  H01L27/10891 ,  H01L27/10894 ,  H01L29/0649 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes: a substrate having a plurality of active regions; a plurality of bit lines extending in a first direction, the plurality of bit lines being separate from the substrate with an insulating layer therebetween; a plurality of first insulating lines extending in a second direction that is different from the first direction, wherein the plurality of first insulating lines intersect the plurality of bit lines and have upper surfaces having levels which are higher than those of upper surfaces of the plurality of bit lines relative to the substrate; and a plurality of first contact structures connected to the plurality of active regions, the plurality of first contact structures being disposed in an area defined by the plurality of bit lines and the plurality of first insulating lines.