公开(公告)号：US20230146691A1

公开(公告)日：2023-05-11

申请号：US17978489

申请日：2022-11-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Bongki SON ,  Jeongyong SHIN ,  Seunghyun LIM

IPC: G06T5/50 ,  G06T3/40 ,  G06T3/60

CPC classification number: G06T5/50 ,  G06T3/4038 ,  G06T3/60 ,  G06T2207/20221

Abstract: An imaging device includes an image sensor configured to generate a plurality of original images, and an image processor configured to generate a merged image based on the plurality of original images. The image processor is configured to generate the merged image by classifying the plurality of original images into a plurality of stitching groups based on a first stitching direction, stitching original images included in a same stitching group to generate a plurality of intermediate images, and stitching the plurality of intermediate images based on a second stitching direction to generate the merged image.

公开(公告)号：US20230187519A1

公开(公告)日：2023-06-15

申请号：US17896523

申请日：2022-08-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinkyung SON ,  Seungje KIM ,  Jiwon PARK ,  Jaepo LIM ,  Minseok JO ,  Seunghyun LIM ,  Jinyoung CHOI

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/08 ,  H01L29/786 ,  H01L29/775 ,  H01L29/66

CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/0847 ,  H01L29/78696 ,  H01L29/775 ,  H01L29/66553 ,  H01L29/66545 ,  H01L29/66742 ,  H01L29/66439

Abstract: A semiconductor device is provided. The semiconductor device includes: a substrate with an active region extending in a first direction; an element isolation layer, adjacent to the active region, in the substrate; a gate electrode on the substrate and extending in a second direction which crosses the first direction; a plurality of channel layers on the active region, spaced apart from each other along a third direction perpendicular to an upper surface of the substrate, and surrounded by the gate electrode; and a source/drain region provided in a recess of the active region adjacent to the gate electrode, and connected to the plurality of channel layers. In the first direction, the gate electrode has a first length on the active region and a second length, greater than the first length, on the element isolation layer.

公开(公告)号：US20240321989A1

公开(公告)日：2024-09-26

申请号：US18397561

申请日：2023-12-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gunho JO ,  Heesub KIM ,  Seunghyun LIM ,  Bomi KIM ,  Eunho CHO

IPC: H01L29/423 ,  H01L29/06 ,  H01L29/417 ,  H01L29/66 ,  H01L29/775

CPC classification number: H01L29/42392 ,  H01L29/0673 ,  H01L29/41733 ,  H01L29/66439 ,  H01L29/66545 ,  H01L29/775

Abstract: A semiconductor device includes a substrate, an active pattern including a lower pattern extending in a first direction and a plurality of sheet patterns above an upper surface of the lower pattern and spaced apart from the lower pattern in a second direction substantially perpendicular to the first direction, a gate structure on the lower pattern and including a gate electrode and a gate insulating film, the gate electrode and the gate insulating film at least partially surrounding the plurality of sheet patterns, a first gate capping pattern on the gate structure and above the plurality of sheet patterns in the second direction, a gate spacer extending along a side wall of the gate structure, and a second gate capping pattern extending along an upper surface of the gate structure and an upper surface of the first gate capping pattern.

公开(公告)号：US20240179434A1

公开(公告)日：2024-05-30

申请号：US18467318

申请日：2023-09-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dongjae HAN ,  Jaejung PARK ,  Seunghyun LIM ,  Haneul JUNG

IPC: H04N25/75 ,  H04N25/616 ,  H04N25/65

CPC classification number: H04N25/75 ,  H04N25/616 ,  H04N25/65

Abstract: A ramp signal generator may include a current cell unit including a plurality of current sources configured to generate current signals, and a resistance unit connected to an output terminal of the current cell unit. The resistance unit may include a load resistor and an offset resistor connected in series with the load resistor and having a resistance based on analog gains.