公开(公告)号：US20140291758A1

公开(公告)日：2014-10-02

申请号：US14100455

申请日：2013-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Kyun Lee ,  Chan-Ho Park

IPC: H01L29/417 ,  H01L29/78

CPC classification number: H01L29/41766 ,  H01L21/26586 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device includes a channel layer on a substrate; cell trench patterns in the channel layer; and a source pattern on the cell trench patterns. The source pattern includes: grooves, each having inclined sidewalls and bottom that extends in a horizontal direction in a portion of the channel layer between the cell trench patterns, source regions at the inclined sidewalls of the grooves, source isolation regions at the bottoms of the grooves, and a source electrode at interior regions of the grooves and that has a planar upper surface.

Abstract translation: 半导体器件包括在衬底上的沟道层; 通道层中的单元沟槽图案; 以及在单元沟道图案上的源图案。 源图案包括：凹槽，每个凹槽具有倾斜的侧壁和底部，其在沟槽层的一部分中在水平方向上延伸，所述沟槽层在单元沟槽图案之间，沟槽的倾斜侧壁处的源区域，在底部的源极隔离区域 凹槽和源极电极，并且具有平坦的上表面。

公开(公告)号：US09324859B2

公开(公告)日：2016-04-26

申请号：US14515783

申请日：2014-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heon-Bok Lee ,  In-Ho Yeo ,  Sae-Choon Oh ,  Suk-Kyun Lee ,  Jung-Ho Lee

IPC: H01L21/30 ,  H01L29/78 ,  H01L29/66 ,  H01L29/40 ,  H01L29/423 ,  H01L21/306 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/265 ,  H01L21/311

CPC classification number: H01L29/7813 ,  H01L21/26586 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/32133 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66727 ,  H01L29/66734

Abstract: A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and surrounded by an insulating structure to float the shield electrode.

Abstract translation: 分离栅沟槽场效应晶体管包括形成在沟槽中的栅电极。 屏蔽栅极形成在栅电极下方的沟槽中并被绝缘结构包围以使屏蔽电极浮动。

公开(公告)号：US20150295080A1

公开(公告)日：2015-10-15

申请号：US14515783

申请日：2014-10-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Heon-Bok Lee ,  In-Ho Yeo ,  Sae-Choon Oh ,  Suk-Kyun Lee ,  Jung-Ho Lee

IPC: H01L29/78 ,  H01L29/40 ,  H01L29/423 ,  H01L21/311 ,  H01L21/308 ,  H01L21/3213 ,  H01L21/265 ,  H01L29/66 ,  H01L21/306

CPC classification number: H01L29/7813 ,  H01L21/26586 ,  H01L21/30604 ,  H01L21/308 ,  H01L21/31111 ,  H01L21/32133 ,  H01L29/404 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/66727 ,  H01L29/66734

Abstract: A split gate trench field effect transistor includes a gate electrode formed in a trench. A shield gate is formed in a trench below the gate electrode and surrounded by an insulating structure to float the shield electrode.

Abstract translation: 分离栅沟槽场效应晶体管包括形成在沟槽中的栅电极。 屏蔽栅极形成在栅电极下方的沟槽中并被绝缘结构包围以使屏蔽电极浮动。

公开(公告)号：US09318566B2

公开(公告)日：2016-04-19

申请号：US14159940

申请日：2014-01-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Kyun Lee ,  Eung-Kyu Lee

IPC: H01L21/336 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/423 ,  H01L29/45 ,  H01L29/08

CPC classification number: H01L29/407 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7811 ,  H01L29/7813

Abstract: In a method of fabricating a semiconductor device, a channel layer is formed on a substrate, and trench patterns are formed in the channel layer. Impurity bodies are formed in the channel layer between the trench patterns, and grooves are formed between the trench patterns in the impurity bodies formed in the channel layer. Source isolation regions are formed in the impurity bodies at bottom portions of the grooves, and source regions are formed in the impurity bodies at sidewall portions of the grooves.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成沟道层，并且在沟道层中形成沟槽图案。 杂质体形成在沟槽图案之间的沟道层中，并且在沟道层中形成的杂质体中的沟槽图案之间形成沟槽。 源极隔离区域形成在槽的底部的杂质体中，源极区域形成在沟槽的侧壁部分的杂质体中。

公开(公告)号：US09306015B2

公开(公告)日：2016-04-05

申请号：US14100455

申请日：2013-12-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Kyun Lee ,  Chan-Ho Park

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/265 ,  H01L29/40 ,  H01L29/423 ,  H01L29/45 ,  H01L29/08

CPC classification number: H01L29/41766 ,  H01L21/26586 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device includes a channel layer on a substrate; cell trench patterns in the channel layer; and a source pattern on the cell trench patterns. The source pattern includes: grooves, each having inclined sidewalls and bottom that extends in a horizontal direction in a portion of the channel layer between the cell trench patterns, source regions at the inclined sidewalls of the grooves, source isolation regions at the bottoms of the grooves, and a source electrode at interior regions of the grooves and that has a planar upper surface.

Abstract translation: 半导体器件包括在衬底上的沟道层; 通道层中的单元沟槽图案; 以及在单元沟道图案上的源图案。 源图案包括：凹槽，每个凹槽具有倾斜的侧壁和底部，其在沟槽层的一部分中在水平方向上延伸，所述沟槽层在单元沟槽图案之间，沟槽的倾斜侧壁处的源区域，在底部的源极隔离区域 凹槽和源极电极，并且具有平坦的上表面。

公开(公告)号：US20140295632A1

公开(公告)日：2014-10-02

申请号：US14159940

申请日：2014-01-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Suk-Kyun Lee ,  Eung-Kyu Lee

IPC: H01L29/66

CPC classification number: H01L29/407 ,  H01L29/0869 ,  H01L29/0878 ,  H01L29/41766 ,  H01L29/42356 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/66727 ,  H01L29/7811 ,  H01L29/7813

Abstract: In a method of fabricating a semiconductor device, a channel layer is formed on a substrate, and trench patterns are formed in the channel layer. Impurity bodies are formed in the channel layer between the trench patterns, and grooves are formed between the trench patterns in the impurity bodies formed in the channel layer. Source isolation regions are formed in the impurity bodies at bottom portions of the grooves, and source regions are formed in the impurity bodies at sidewall portions of the grooves.

Abstract translation: 在制造半导体器件的方法中，在衬底上形成沟道层，并且在沟道层中形成沟槽图案。 杂质体形成在沟槽图案之间的沟道层中，并且在沟道层中形成的杂质体中的沟槽图案之间形成沟槽。 源极隔离区域形成在槽的底部的杂质体中，源极区域形成在沟槽的侧壁部分的杂质体中。