Built-in self-test circuits and semiconductor integrated circuits including the same

    公开(公告)号:US11867757B2

    公开(公告)日:2024-01-09

    申请号:US17465337

    申请日:2021-09-02

    CPC classification number: G01R31/31725 G01R31/31724 H03M1/1071

    Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.

    SEMICONDUCTOR INTEGRATED CIRCUIT AND METHOD OF TESTING THE SAME

    公开(公告)号:US20220206062A1

    公开(公告)日:2022-06-30

    申请号:US17471763

    申请日:2021-09-10

    Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.

    Analog-to-digital conversion circuit and receiver including same

    公开(公告)号:US11996857B2

    公开(公告)日:2024-05-28

    申请号:US17827135

    申请日:2022-05-27

    CPC classification number: H03M1/1014

    Abstract: An analog-to-digital conversion circuit includes analog-to-digital converters (ADCs) including a target analog-to-digital converter (ADC) providing second data samples, a first adjacent ADC providing first data samples, and a second adjacent ADC providing third data samples. The ADCs perform an analog-to-digital conversion using a time-interleaving approach in response to clock signals having different phases and including a reference clock signal. A timing calibration circuit includes a relative time skew generator generating a relative time skew and an absolute time skew generator generate an absolute time skew. A clock generator adjusts at least one phase of the clock signals based on the absolute time skew.

    Semiconductor integrated circuit and method of testing the same

    公开(公告)号:US11698410B2

    公开(公告)日:2023-07-11

    申请号:US17471763

    申请日:2021-09-10

    CPC classification number: G01R31/2884 H03K5/24 H03M1/124

    Abstract: A test method is provided to test a semiconductor integrated circuit including an analog-to-digital converter and/or a digital-to-analog converter. An analog test signal having a test pattern is generated using an analog test signal generator or a digital test signal having the test pattern using a digital test signal generator. An analog output signal corresponding to the test pattern is generated by applying, as a digital input signal, the digital test signal having the test pattern to a digital-to-analog converter responsive to generation of the digital test signal. A digital output signal corresponding to the test pattern is generated by applying, as an analog input signal, the analog test signal having the test pattern or the analog output signal corresponding to the test pattern to an analog-to-digital converter. A normality of the semiconductor integrated circuit is determined based on the digital output signal corresponding to the test pattern.

    BUILT-IN SELF-TEST CIRCUITS AND SEMICONDUCTOR INTEGRATED CIRCUITS INCLUDING THE SAME

    公开(公告)号:US20220187366A1

    公开(公告)日:2022-06-16

    申请号:US17465337

    申请日:2021-09-02

    Abstract: A semiconductor integrated circuit includes a digital-to-analog converter and a built-in self-test circuit. The digital-to-analog converter performs a normal conversion operation to generate an analog output signal by converting a digital input signal corresponding to an external digital signal that is provided from an external device outside the semiconductor integrated circuit and provide the analog output signal to the external device. The built-in self-test circuit, while the digital-to-analog converter performs the normal conversion operation, performs a real-time monitoring operation to generate a comparison alarm signal based on the digital input signal and the analog output signal such that the comparison alarm signal indicates whether the digital-to-analog converter operates normally. Performance and reliability of the digital-to-analog converter and the semiconductor integrated circuit including the digital-to-analog converter may be enhanced by monitoring in real-time abnormality of the digital-to-analog converter using the on-time monitor.

Patent Agency Ranking