METHOD OF FABRICATING SEMICONDUCTOR DEVICE

    公开(公告)号:US20230042905A1

    公开(公告)日:2023-02-09

    申请号:US17704465

    申请日:2022-03-25

    Abstract: A method of fabricating a semiconductor device is disclosed. The method may include forming an etch-target layer, a mask layer, a blocking layer, and a photoresist layer, which are sequentially stacked on a substrate; forming a photoresist pattern, the forming the photoresist pattern including irradiating the photoresist layer with extreme ultraviolet (EUV) light; forming a mask layer, the forming the mask layer including etching the mask layer using the photoresist pattern as an etch mask; and forming a target pattern, the forming the target pattern including etching the etch-target layer using the mask pattern as an etch mask. The photoresist layer may include an organic metal oxide. The blocking layer may be a non-polar layer and may limit and/or prevent a metallic element in the photoresist layer from infiltrating into the mask layer.

    METHOD OF FORMING A PATTERN
    2.
    发明申请

    公开(公告)号:US20230036420A1

    公开(公告)日:2023-02-02

    申请号:US17697019

    申请日:2022-03-17

    Abstract: A method of forming a pattern includes forming an etching object layer on a substrate. A photoresist layer including a metal, oxygen and an organic material is formed on the etching object layer. An exposure process is performed on the photoresist layer. A developing process is performed on the photoresist layer to form a photoresist pattern including a metal oxide. Ozone is provided onto the substrate to remove a residue of the photoresist layer that includes the organic material, The etching object layer is etched using the photoresist pattern as an etching mask.

    METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE

    公开(公告)号:US20240282576A1

    公开(公告)日:2024-08-22

    申请号:US18535594

    申请日:2023-12-11

    CPC classification number: H01L21/0274 G03F7/70625 G03F7/70633 H01L21/3043

    Abstract: A method of manufacturing a semiconductor device includes bonding a first semiconductor substrate on a second semiconductor substrate; performing a first physical parameter measurement on a first surface of the first semiconductor substrate to obtain first displacement data; polishing the first surface of the first semiconductor substrate after the first displacement data is obtained; performing a second physical parameter measurement on the polished first surface of the first semiconductor substrate to obtain second displacement data; and forming circuit patterns on the polished first surface of the first semiconductor substrate based on the second displacement data.

    SEMICONDUCTOR DEVICE
    4.
    发明公开

    公开(公告)号:US20240055425A1

    公开(公告)日:2024-02-15

    申请号:US18365452

    申请日:2023-08-04

    CPC classification number: H01L27/088 H01L29/775 H01L29/42392 H01L29/0673

    Abstract: A semiconductor device is provided, the semiconductor device including; a substrate; a first fin structure extending on the substrate in a first direction, and having a first fin portion having a first width and a second fin portion having a second width; a second fin structure extending on the substrate in the first direction, and having the second width; first gate lines disposed on the first fin portion and the second fin structure, and extending in a second direction; second gate lines disposed on the second fin portion and the second fin structure, and extending in the second direction; a third gate line disposed on the second fin structure, and extending in the second direction between the first and second gate lines; and a device isolation pattern connected to an end portion of the third gate, and extending between the first and second fin portions.

    EXTREME ULTRAVIOLET (EUV) PHOTOMASK
    5.
    发明公开

    公开(公告)号:US20230400758A1

    公开(公告)日:2023-12-14

    申请号:US18317328

    申请日:2023-05-15

    CPC classification number: G03F1/22

    Abstract: An extreme ultraviolet (EUV) photomask may include a mask structure including a main region, a scribe lane region surrounding the main region, buffer regions outside the scribe lane region and apart from each other and each having a same first width, and a black border region outside the buffer regions. The buffer regions may include a first buffer region, a second buffer region, and a third buffer region. The black border region may include a first corner region, a second corner region, and a third corner region. The first corner region may contact the first buffer region and the second buffer region. The second corner region may contact the first buffer region, the third buffer region, and a side of the scribe lane region. The third corner region may contact the second buffer region and the third buffer region.

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