公开(公告)号：US11646241B2

公开(公告)日：2023-05-09

申请号：US16720131

申请日：2019-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon Choi ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyoung Choi

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/00 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/28 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49568 ,  H01L23/49575 ,  H01L23/5384 ,  H01L24/14 ,  H01L25/0657

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US20230268241A1

公开(公告)日：2023-08-24

申请号：US18140907

申请日：2023-04-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon CHOI ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyung Chol

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/00 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065

CPC classification number: H01L23/34 ,  H01L23/4952 ,  H01L23/49541 ,  H01L23/49568 ,  H01L24/14 ,  H01L23/28 ,  H01L23/5384 ,  H01L25/0657 ,  H01L23/49575

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US20200273771A1

公开(公告)日：2020-08-27

申请号：US16720131

申请日：2019-12-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaehoon Choi ,  Sayoon Kang ,  Taewook Kim ,  Hwasub Oh ,  Jooyoung Choi

IPC: H01L23/34 ,  H01L23/495 ,  H01L23/28 ,  H01L23/538 ,  H01L25/065 ,  H01L23/00

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a first redistribution layer; a semiconductor chip disposed on the first surface of the connection structure and including connection pads connected to the first redistribution layer; an encapsulant disposed on the first surface of the connection structure and encapsulating the semiconductor chip; and a second redistribution layer disposed on the encapsulant; a wiring structure connecting the first and second redistribution layers to each other and extending in a stacking direction; and a heat dissipation element disposed on at least a portion of the second surface of the connection structure.

公开(公告)号：US20240007090A1

公开(公告)日：2024-01-04

申请号：US18303502

申请日：2023-04-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seongsoo Park ,  Taewook Kim ,  Hyunwoong Lim ,  Taewan Kim ,  Hyungyu Kim ,  Jooik Chung ,  Michael Choi

IPC: H03K5/00 ,  H03K17/687

CPC classification number: H03K5/00006 ,  H03K17/6874

Abstract: A frequency multiplier includes a capacitor circuit having a plurality of capacitors therein, and is responsive to a differential input signal applied to an inverting input node and a non-inverting input node thereof. A frequency multiplication circuit (FMC) is provided, which has a plurality of transistors therein. The FMC is configured to receive components of the differential input signal passing through the plurality of capacitors, and multiply a frequency of the components of the differential input signal. A plurality of inductor loads are provided, which are connected to an inverting output node and a non-inverting output node of the FMC, and are configured to convert a current signal generated by the FMC into a voltage signal.

公开(公告)号：US11049815B2

公开(公告)日：2021-06-29

申请号：US16584027

申请日：2019-09-26

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jooyoung Choi ,  Taewook Kim ,  Byungho Kim ,  Sangseok Hong ,  Jaehoon Choi ,  Seongjin Shin

IPC: H01L23/538 ,  H01L23/00 ,  H01L23/31 ,  H01L23/367

Abstract: A semiconductor package includes a connection structure having first and second surfaces opposing each other and including a redistribution layer. A semiconductor chip is disposed on the first surface of the connection structure and has connection pads connected to the redistribution layer. An encapsulant is disposed on the first surface of the connection structure and covers the semiconductor chip. A support pattern is disposed on a portion of an upper surface of the encapsulant. A heat dissipation bonding material has a portion embedded in the encapsulant in a region overlapping the semiconductor chip and extends to the upper surface of the encapsulant so as to cover the support pattern. A heat dissipation element is bonded to the upper surface of the encapsulant by the heat dissipation bonding material.

公开(公告)号：US11862603B2

公开(公告)日：2024-01-02

申请号：US17001978

申请日：2020-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taewook Kim ,  Jongho Lee ,  Jeongjoon Oh ,  Hyeon Hwang

IPC: H01L21/768 ,  H01L23/522 ,  H01L23/00 ,  H01L23/31 ,  H01L23/495 ,  H01L23/528 ,  H01L23/532 ,  H01L25/065

CPC classification number: H01L25/0652 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2225/06589

Abstract: A semiconductor package includes a package substrate; a plurality of lower chip structures on the package substrate; an upper chip structure on the plurality of lower chip structures and covering portions of upper surfaces of the plurality of lower chip structures; a non-conductive adhesive layer on a lower surface of the upper chip structure and receiving upper portions of the plurality of lower chip structures; and a molded member on the plurality of lower chip structures and the upper chip structure.

公开(公告)号：US20210159213A1

公开(公告)日：2021-05-27

申请号：US17001978

申请日：2020-08-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Taewook Kim ,  Jongho Lee ,  Jeongjoon Oh ,  Hyeon Hwang

IPC: H01L25/065

Abstract: A semiconductor package includes a package substrate; a plurality of lower chip structures on the package substrate; an upper chip structure on the plurality of lower chip structures and covering portions of upper surfaces of the plurality of lower chip structures; a non-conductive adhesive layer on a lower surface of the upper chip structure and receiving upper portions of the plurality of lower chip structures; and a molded member on the plurality of lower chip structures and the upper chip structure.