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    Nonvolatile memory device and method for fabricating the same
    1.
    发明授权
    Nonvolatile memory device and method for fabricating the same 有权
    非易失性存储器件及其制造方法

    公开(公告)号：US09276132B2

    公开(公告)日：2016-03-01

    申请号：US13969912

    申请日：2013-08-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Woo-Sung Lee ,  Kyong-Won An

    IPC: H01L29/792 ,  H01L29/66 ,  H01L27/115

    CPC classification number: H01L29/792 ,  H01L27/11582 ,  H01L29/66833 ,  H01L29/7926

    Abstract: A nonvolatile memory device includes an insulating pattern extending in a first direction, a conductive pattern on the insulating pattern, and an electrode structure extending in the first direction. The electrode structure is adjacent the insulating pattern and conductive pattern, and includes an alternating pattern of gate electrodes and interlayer insulating films. A protection film adjacent a side surface of the electrode structure has a shorter length in the first direction than a length of the electrode structure.

    Abstract translation: 非易失性存储器件包括沿第一方向延伸的绝缘图案，绝缘图案上的导电图案和沿第一方向延伸的电极结构。 电极结构与绝缘图案和导电图案相邻，并且包括栅电极和层间绝缘膜的交替图案。 与电极结构的侧表面相邻的保护膜在第一方向上比电极结构的长度具有更短的长度。

    Vertical memory devices
    2.
    发明授权
    Vertical memory devices 有权

    公开(公告)号：US11521987B2

    公开(公告)日：2022-12-06

    申请号：US17195756

    申请日：2021-03-09

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji-Hoon Choi ,  Sung-Gil Kim ,  Jung-Hwan Kim ,  Chan-Hyoung Kim ,  Woo-Sung Lee

    IPC: H01L27/00 ,  H01L27/1157 ,  H01L27/11582 ,  H01L27/11556 ,  H01L27/11524

    Abstract: A vertical memory device may include a channel connecting pattern on a substrate, gate electrodes spaced apart from each other in a first direction on the channel connecting pattern, and a channel extending in the first direction through the gate electrodes and the channel connecting pattern. Each of the electrodes may extend in a second direction substantially parallel to an upper surface of the substrate, and the first direction may be substantially perpendicular to the upper surface of the substrate. An end portion of the channel connecting pattern in a third direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the second direction may have an upper surface higher than an upper surface of other portions of the channel connecting pattern except for a portion thereof adjacent the channel.

    VERTICAL MEMORY DEVICES
    3.
    发明申请
    VERTICAL MEMORY DEVICES 审中-公开

    公开(公告)号：US20200176467A1

    公开(公告)日：2020-06-04

    申请号：US16516756

    申请日：2019-07-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji-Hoon Choi ,  Sung-Gil Kim ,  Jung-Hwan Kim ,  Chan-Hyoung Kim ,  Woo-Sung Lee

    IPC: H01L27/11582 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157

    Abstract: A vertical memory device may include a channel connecting pattern on a substrate, gate electrodes spaced apart from each other in a first direction on the channel connecting pattern, and a channel extending in the first direction through the gate electrodes and the channel connecting pattern. Each of the electrodes may extend in a second direction substantially parallel to an upper surface of the substrate, and the first direction may be substantially perpendicular to the upper surface of the substrate. An end portion of the channel connecting pattern in a third direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the second direction may have an upper surface higher than an upper surface of other portions of the channel connecting pattern except for a portion thereof adjacent the channel.

    METHOD FOR PROCESSING DATA IN STORAGE DEVICE AND STORAGE DEVICE
    5.
    发明申请
    METHOD FOR PROCESSING DATA IN STORAGE DEVICE AND STORAGE DEVICE 有权
    用于在存储设备和存储设备中处理数据的方法

    公开(公告)号：US20150199130A1

    公开(公告)日：2015-07-16

    申请号：US14586660

    申请日：2014-12-30

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Woo-Sung Lee ,  Dong-Jun Shin

    IPC: G06F3/06

    CPC classification number: G06F3/0604 ,  G06F3/0611 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679

    Abstract: In an embodiment, a method is provided for processing data in a storage device, and a storage device. The method includes writing data according to a write command received from a processor. The method also includes determining whether a predetermined write restriction time has elapsed. The method also includes discontinuing the data writing upon expiration of the predetermined write restriction time.

    Abstract translation: 在一个实施例中，提供了一种用于处理存储设备中的数据的方法和存储设备。 该方法包括根据从处理器接收的写入命令来写入数据。 该方法还包括确定是否已经过去了预定的写入限制时间。 该方法还包括在预定的写入限制时间到期时停止数据写入。

    METHOD FOR TRANSMITTING DATA AND ELECTRONIC DEVICE THEREOF
    7.
    发明申请
    METHOD FOR TRANSMITTING DATA AND ELECTRONIC DEVICE THEREOF 审中-公开
    发送数据的方法及其电子设备

    公开(公告)号：US20140313917A1

    公开(公告)日：2014-10-23

    申请号：US14259062

    申请日：2014-04-22

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chan-Ho Jung ,  Woo-Sung Lee

    IPC: H04L12/26

    CPC classification number: H04L67/327 ,  H04L1/12 ,  H04L29/06095 ,  H04L43/0847 ,  H04L69/16

    Abstract: A method for deciding a User Datagram Protocol (UDP) connection method or a Transmission Control Protocol (TCP) connection method and transmitting/receiving data includes the operations of transmitting data to a second electronic device in a UDP method, receiving feedback information about reception of the data, from the second electronic device, and transmitting partial data of the data, the partial corresponding to the feedback information in a TCP method or the UDP method. The feedback information includes information about the partial data failing in reception among the data.

    Abstract translation: 用于确定用户数据报协议（UDP）连接方法或传输控制协议（TCP）连接方法和发送/接收数据的方法包括以UDP方式向第二电子设备发送数据的操作，接收关于接收到 来自第二电子设备的数据，并且发送数据的部分数据，对应于TCP方法中的反馈信息的部分或UDP方法。 反馈信息包括关于在数据中的部分数据接收失败的信息。

    Vertical memory devices
    8.
    发明授权
    Vertical memory devices 有权

    公开(公告)号：US10943918B2

    公开(公告)日：2021-03-09

    申请号：US16516756

    申请日：2019-07-19

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Ji-Hoon Choi ,  Sung-Gil Kim ,  Jung-Hwan Kim ,  Chan-Hyoung Kim ,  Woo-Sung Lee

    IPC: H01L27/00 ,  H01L27/11582 ,  H01L27/1157 ,  H01L27/11556 ,  H01L27/11524

    Abstract: A vertical memory device may include a channel connecting pattern on a substrate, gate electrodes spaced apart from each other in a first direction on the channel connecting pattern, and a channel extending in the first direction through the gate electrodes and the channel connecting pattern. Each of the electrodes may extend in a second direction substantially parallel to an upper surface of the substrate, and the first direction may be substantially perpendicular to the upper surface of the substrate. An end portion of the channel connecting pattern in a third direction substantially parallel to the upper surface of the substrate and substantially perpendicular to the second direction may have an upper surface higher than an upper surface of other portions of the channel connecting pattern except for a portion thereof adjacent the channel.

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