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公开(公告)号:US20240324183A1
公开(公告)日:2024-09-26
申请号:US18489034
申请日:2023-10-18
Applicant: Samsung Electronics Co., Ltd.
Inventor: Chanhoon Park , Jongkyu Kim , Seunghoon Kim , Sohyun Park , Woohyun Lee
IPC: H10B12/00
CPC classification number: H10B12/482 , H10B12/02 , H10B12/315 , H10B12/485
Abstract: An integrated circuit device includes a substrate having an active area, a plurality of bit line structures on the substrate, the plurality of bit line structures including insulating spacers on sidewalls thereof, a buried contact between the plurality of bit line structures and electrically connected to the active area, an insulation capping pattern on a bit line structure of the plurality of bit line structures, and a landing pad electrically connected to the buried contact, the landing pad arranged to vertically overlap the bit line structure on the insulation capping pattern, wherein an uppermost surface of the landing pad is higher than an uppermost surface of the insulation capping pattern, relative to the substrate.
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公开(公告)号:US10395979B2
公开(公告)日:2019-08-27
申请号:US16015809
申请日:2018-06-22
Applicant: Samsung Electronics Co., Ltd.
Inventor: Inho Kim , Woohyun Lee , Oik Kwon , Sang-Kuk Kim , Yeonji Kim , Jongchul Park
IPC: H01L27/11573 , H01L21/768 , H01L27/22 , H01L43/12 , H01L43/02
Abstract: A semiconductor device includes a first lower insulating interlayer, a protection insulating layer, and a first upper insulating interlayer that are sequentially stacked on a substrate, and a conductive pattern penetrating the first upper insulating interlayer, the protection insulating layer; and the first lower insulating interlayer. The conductive pattern includes a line part extending in a direction parallel to an upper surface of the substrate and contact parts extending from the line part toward the substrate. The contact parts are separated from each other with an insulating pattern therebetween. The insulating pattern includes a portion of each of the first upper insulating interlayer, the protection insulating layer, and the first lower insulating interlayer. At least a portion of the insulating pattern has a stepped profile.
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公开(公告)号:US10608173B2
公开(公告)日:2020-03-31
申请号:US16284439
申请日:2019-02-25
Applicant: Samsung Electronics Co., Ltd.
Inventor: Yil-hyung Lee , Jong-Kyu Kim , Jongchul Park , Sang-Kuk Kim , Jongsoon Park , Hyeji Yoon , Woohyun Lee
Abstract: An ion beam apparatus may include a chamber assembly configured to hold a material and direct an ion beam on the material, a detector configured to detect a signal generated from the material based on the ion beam being directed on the material, and a controller configured to control at least one parameter associated with the chamber assembly based on the signal, such that at least one of an ion energy associated with the ion beam, an ion current associated with the ion beam, and an incident angle of the ion beam with respect to a top surface of the material is changed continuously with time.
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公开(公告)号:US10396277B2
公开(公告)日:2019-08-27
申请号:US15970963
申请日:2018-05-04
Applicant: Samsung Electronics Co., Ltd.
Inventor: Woohyun Lee , Sang-Kuk Kim , Oik Kwon , Inho Kim , Jongchul Park , Kwangyoung Oh
Abstract: A magnetic memory device includes a lower interlayer insulating layer on a substrate, and a plurality of magnetic tunnel junction patterns on the lower interlayer insulating layer and isolated from direct contact with each other in a direction extending parallel to a top surface of the substrate. The lower interlayer insulating layer includes an upper surface including a recessed surface and a top surface, the recessed surface at least partially defining an inner sidewall and a bottom surface of a recess region between adjacent magnetic tunnel junction patterns, such that the recessed surface at least partially defines the recess region. The inner sidewall is inclined at an acute angle with respect to the top surface of the substrate, and the bottom surface has a shape that is convex toward the top surface of the substrate, in direction extending perpendicular to the top surface of the substrate.
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