公开(公告)号：US20240243117A1

公开(公告)日：2024-07-18

申请号：US18412177

申请日：2024-01-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongeun Cho ,  Eunhee Choi ,  Kibum Kim ,  Seonkyeong Kim ,  Hayoung Kim ,  Hyunjeong Roh ,  Moogyu Bae

IPC: H01L27/02 ,  H01L23/528 ,  H01L27/092

CPC classification number: H01L27/0207 ,  H01L23/5286 ,  H01L27/0928 ,  H01L27/0924

Abstract: An integrated circuit includes a first region having a plurality of first cells arranged in first rows extending in a first direction and a plurality of first gate electrodes extending in a second direction that crosses the first direction, a second region having a plurality of second cells arranged in second rows extending in the first direction and a plurality of second gate electrodes extending in the second direction, and a third region between the first region and the second region and having a plurality of third gate electrodes extending in the second direction. A second height of each of the second rows is greater than a first height of each of the first rows. A pitch of the first gate electrodes, a pitch of the second gate electrodes, and a pitch of the third gate electrodes are the same.

公开(公告)号：US11699992B2

公开(公告)日：2023-07-11

申请号：US16726379

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jintae Kim ,  Byounggon Kang ,  Changbeom Kim ,  Ha-Young Kim ,  Yongeun Cho

IPC: H03K3/037 ,  H01L27/02 ,  H01L23/528 ,  H01L29/06 ,  H01L27/092 ,  H01L23/522 ,  H01L29/423

CPC classification number: H03K3/0372 ,  H01L23/5226 ,  H01L23/5286 ,  H01L27/0207 ,  H01L27/0924 ,  H01L29/0673 ,  H01L29/42392

Abstract: A semiconductor device includes a flip flop cell. The flip flop cell is formed on a semiconductor substrate, includes a flip flop circuit, and comprises a scan mux circuit, a master latch circuit, a slave latch circuit, a clock driver circuit, and an output circuit. Each of the scan mux circuit, the master latch circuit, the slave latch circuit, the clock driver circuit, and the output circuit includes a plurality of active devices which together output a resulting signal for that circuit based on inputs, is a sub-circuit of the flip flop circuit, and occupies a continuously-bounded area of the flip flop circuit from a plan view. At least a first sub-circuit and a second sub-circuit of the sub-circuits overlap from the plan view in a first overlap region, the first overlap region including part of a first continuously-bounded area for the first sub-circuit and part of a second continuously-bounded area for the second sub-circuit.

公开(公告)号：US11387229B2

公开(公告)日：2022-07-12

申请号：US16826756

申请日：2020-03-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaeha Lee ,  Ha-Young Kim ,  Bonghyun Lee ,  Soyoung Lee ,  Yongeun Cho

IPC: H01L29/76 ,  H01L27/02 ,  G06F30/398 ,  G06F30/394 ,  G06F30/392

Abstract: Disclosed is a semiconductor device comprising a logic cell including first and second active regions spaced apart in a first direction on a substrate, first and second active patterns on the first and second active regions and extend in a second direction, first and second source/drain patterns on the first and second active patterns, gate electrodes extending in the first direction to run across the first and second active patterns and arranged in the second direction at a first pitch, first lines in a first interlayer dielectric layer on the gate electrodes and each electrically connected to the first source/drain pattern, the second source/drain pattern, or the gate electrode, and second lines in a second interlayer dielectric layer on the first interlayer dielectric layer and extending parallel to each other in the first direction.